標題: 交流伺服馬達FPGA控制IC之研製
Design and Implementation of an FPGA-Based Motor Control IC for AC Servo Motors
作者: 郭天送
Kuo, Tien-Sung
鄒應嶼
ying-yu Tzou
電控工程研究所
關鍵字: 交流伺服馬達;控制;FPGA;control IC;AC servo motor
公開日期: 1996
摘要: 本論文針對交流伺服馬達提出全數位向量控制IC的電路架構,並以場 可規畫邏輯陣列(field programmable gate array, FPGA)將之實現。此 交流伺服馬達向量控制IC(AC servo motor vector control IC)定名為 DMC-3000,可同時適用於同步馬達與感應馬達之向量伺服控制,主要架構 包含三部份:電流向量控制、解耦控制及伺服控制。為了簡化設計與降低 硬體實現之複雜度,本論文採用模組化設計,將主要單元再細分為各個功 能單純的模組。本文同時分析系統需求,探討位元長度及控制IC之規格, 除了伺服控制之速度命令與回授量以十四位元2's補數方式實現外,電流 向量控制、解耦控制、微處理器介面及所有控制器參數均以八位元2's補 數方式實現。在周邊處理能力方面,可直接將電流回授量及速度回授量由 類比/讀出可對此IC調整與觀測各個參數及變數,所有參數及變數均可在 線(on-line)及即時(real-time)讀出或寫入,且控制模態亦具有可程式規 畫之特性,使用者可選擇電流向量控制器或交流馬達速度控制模態。此控 制IC將磁通模型(flux model)交由外部微處理器實現,在相同硬體架構下 定義滑差角度與d軸電流兩個暫存器供外部微處理器使用,即可達成交流 感應馬達的向量控制。實驗結果顯示,此控制IC具有良好之性能,僅使用 約25000閘數目(gate count)即可實現完整的交流伺服馬達向量控制架構 。 This thesis presents a hardware circuit architecture of a fully digitalvector control IC for ac servo motor using the field programmable gatearray (FPGA). The modular design approach has been proposed to simplifythe design and realization. The vector control IC for ac servo motor namedDMC-3000 can be used for the vector control of both permanent magnet syn-chronous motor and induction motor. The constructed IC consists of three major parts: a current vector control module, a decoupling control module,and a servo loop module. Specifications of the DMC-3000 are determined based on practical application considerations. Bit length effect of thecontrol IC has be或寫入converter and position feedback from the quadrature encoder can be directlyinterfaced to the develope motor control IC. The DMC-3000 can be incorporatedwith a digital signal processor (DSP) or a microprocessor to provide asimple solution for ac servo motor control. The control and status registersof the DMC-3000 can be on-line adjusted or monitored. A rotor-flux angleregister has been designed in the proposed DMC-3000, therefore, the flux model for the decoupling control of an induction motor can be easily realizedby it's coprocessor. About 25000 gate counts are used to realize the proposedcontrol scheme. Experimental results have been given to verify the design and implementation of the proposed control IC.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT850327043
http://hdl.handle.net/11536/61699
Appears in Collections:Thesis