標題: | The Characteristics of n- and p-Channel Poly-Si Thin-Film Transistors with Fully Ni-Salicided S/D and Gate Structure |
作者: | Kuo, Po-Yi Huang, Yan-Syue Lue, Yi-Hsien Chao, Tien-Sheng Lei, Tan-Fu 電子物理學系 電機工程學系 Department of Electrophysics Department of Electrical and Computer Engineering |
公開日期: | 2010 |
摘要: | n- and p-channel poly-Si thin-film transistors with fully Ni-self-aligned silicided (fully Ni-salicided) source/drain (S/D) and gate structure (n- and p-channel FUSA-TFTs) have been successfully fabricated on a 40 nm thick channel layer. The conventional poly-Si gate is replaced by the fully Ni-silicided gate, and the parasitic S/D resistance of the FUSA-TFTs is significantly reduced by the fully Ni-silicided S/D structure. The fully Ni-salicidation process is executed at a low temperature of 500 degrees C for a short rapid thermal annealing time. Experimental results show that the FUSA-TFTs give increased on/off current ratio, improved subthreshold characteristics, less threshold voltage roll-off, lower parasitic S/D resistance, higher gate capacitance, and larger field-effect mobility than conventional TFTs. The FUSA-TFTs effectively suppress the floating-body effect and parasitic bipolar junction transistor action. The characteristics of the FUSA-TFTs are suitable for three-dimensional integration applications and high performance driver circuits in the active-matrix liquid crystal displays. (C) 2009 The Electrochemical Society. [DOI: 10.1149/1.3258283] All rights reserved. |
URI: | http://hdl.handle.net/11536/6173 http://dx.doi.org/10.1149/1.3258283 |
ISSN: | 0013-4651 |
DOI: | 10.1149/1.3258283 |
期刊: | JOURNAL OF THE ELECTROCHEMICAL SOCIETY |
Volume: | 157 |
Issue: | 1 |
起始頁: | H113 |
結束頁: | H119 |
顯示於類別: | 期刊論文 |