完整後設資料紀錄
DC 欄位語言
dc.contributor.author謝奇諭en_US
dc.contributor.authorShieh, Chyi-Yuen_US
dc.contributor.author張明峰en_US
dc.contributor.authorMing-Feng Changen_US
dc.date.accessioned2014-12-12T02:17:13Z-
dc.date.available2014-12-12T02:17:13Z-
dc.date.issued1996en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT850392014en_US
dc.identifier.urihttp://hdl.handle.net/11536/61761-
dc.description.abstract由於VLSI技術的進步,使得今日微處理機的設計日趨複雜化,所以不管是 功能或邏輯電路上的驗證都是非常困難的,因此我們必需建立一套完整而 有效率的驗證方法,以幫助微處理機於設計階段上的驗證與除錯。在這篇 論文裡,我們依據現有關於微處理機功能驗證的理論,並將其擴充而適用 於目前高效能微處理機的設計。我們以x86微處理機的設計為驗證平台, 首先將設計驗證的過程分為三個部份,包含了資料傳輸路徑、功能單元和 指令集的驗證,然後分別對目的設計定義其合理的錯誤模式,也就是RTL 設計階段上可能出現的錯誤,然後依據錯誤模式而定義測試向量,最後再 設計合適的測試演算法。經過這三個步驟所產生的測試程式可以成功的驗 證其相對應的功能或指令,絕對不會發生錯誤模式中所定義的任一種錯誤 情形。因為我們的測試程式都是經過詳細的分析與定義而得到,而非隨機 所產生的程式;這對於微處理機於設計階段的驗證有很大的幫助,不管是 設計人員無心或疏忽所造成的設計上的錯誤,都可以經由我們正規定義所 產生的測試程式而檢查出來。 It has made a great deal of advance in the VLSI technology in recent years;the current design of microprocessor also gets more complex functions. It ishard to verify the design not only in functional but also in electroniccircuit stage. We need a systematic and efficient procedure in the designverification of microprocessor. In this thesis, we follow the previous studyin functional testing of microprocessor and build a suitable testing procedurefor the current high performance design of x86 microprocessor. The first,wepartition the design verification to three parts that include data-transferpath, functional unit and instruction set; then define the feasible errormodel of RTL design stage. Secondary, follow the definition of error modeland define the test vectors. Finally, define our test algorithms for thetarget design and generate test programs. These programs generated fromthe above three steps can promise the target design will not occur any errorthat defined in the error model. We generate these test programs by analyzingeach functional unit instead of randomization, so it would be feasible in thedesign verification of microprocessor.zh_TW
dc.language.isozh_TWen_US
dc.subject微處理機zh_TW
dc.subject設計驗證zh_TW
dc.subject錯誤模式zh_TW
dc.subject測試向量zh_TW
dc.subject測試程式zh_TW
dc.subjectmicroprocessoren_US
dc.subjectdesign verificationen_US
dc.subjecterror modelen_US
dc.subjecttest vectoren_US
dc.subjecttest programen_US
dc.titlex86微處理機之設計驗證zh_TW
dc.titleDesign Verification of x86 Microprocessoren_US
dc.typeThesisen_US
dc.contributor.department資訊科學與工程研究所zh_TW
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