二伏 900MHz 之 CMOS 射頻前端電路

Abstract

本篇論文描述一個 2 V , 900 MHz 的 CMOS 射頻前級電路設計,主要應用 於無線通訊系統中 902 到 908 MHz ISM 頻帶的超外差式接收器.射頻前 級電路包含了低雜訊放大器, 向下移頻混波器與向上移頻混波器.此外, 本地振盪器輸入緩衝器與偏壓電路也包含在內.低雜訊放大器是單端的兩 級放大電路, 並以源級隨耦器作為輸出緩衝器, 並包含了一個輸入阻抗匹 配網路, 且可達到 20 db 的電壓增益, 模擬上顯示低雜訊放大器可以達 到 1.98 db 的雜音指數.向下移頻混波器與本地振盪驅動電路利用了一個 擁有精確相位差的射頻單端到雙端的電路方式, 能省下兩個外接射頻單端 到雙端轉換器的使用.混波器能達到 10 db 的電壓轉移增益, 而等效於 輸入端功率的 IP3 為 -4 dbm.向上移頻混波器在 0 dbm 的輸入時有 0 dbm 的功率增益.射頻前級電路整個晶片是使用聯電 0.5 um DPDM CMOS 製程加以實現.在單一的 2V 電壓下, 功率消耗為 65 mW. This thesis described the design of a 2 V 900 MHz CMOS RFFront- End circuit, which is used in a superheterodyne receiverfor 902 to 928 MHz ISM band system.The RF front-end consists of a low- noise amplifier (LNA), a down-conversionmixer and a up- conversion mixer. In addition, a LO input buffer andassociated bias circuits are also included.The LNA is a single-ended, two- stage amplifier with source followeras the output buffer. It has a inputimpedance matching network and achieves 20 db voltage gain.Simulation shows the LNA achieve a noise figure of 1.98 db.The down-convert mixer and LO driving circuit employ a RF single-ended todifferential technique with accurate phase difference to save twooff-chip RF baluns . The down-conversion mixer can achieve a voltage conversiongain of 10db and an input- referred IP3 of -4dbm. The up-conversion mixerhas 0 dbm power gain at 0 dbm input power.The RF Front-End has been implemented in UMC 0.5 um DPDMCMOS processes. The power consumption of whole chip is 65 mW froma single 2V supply.