利用多項式模擬來分析和估測互補金氧半導體電路的功率消耗

Abstract

在此篇論文中，我們提出一個已經設計好的電路作功率估算方法。在電路分析的過程中，我們對電路中的每一個節點計算出該節點發生轉換時所消耗的能量，E01和E10，然後在利用零延遲時間信號模擬和每一個節點的轉換能量去估算整個電路所消耗的能量。我們利用多項式模擬對電路模擬所得的資料來產生測試的Pattern，然後再把這些Pattern用Power-Mill對電路作功率估測。在分析完每一組Pattern所消耗的功率之後，我們用三種不同的方法來求解每個節點在發生轉換時所消耗的能量E01和E10，並且建立這個電路節點消耗能量的資料庫。在對電路作功率估測時，只要把輸入Pattern 輸入我們的系統，我們就可以用比Power-Mill快200-300倍的速度算出電路的功率消耗。我們測試各種不同的Pattern，對一些標準的電路而言，不論是哪一種Pattern，平均的誤差在3.32％以下，最大的誤差為7.2％。

In this thesis, we present a method to estimate the power consumption for a designed CMOS circuit. During the characterization, we calculate transition energy E01 and E10 of each node. Then, we use zero delay logic simulation and the node transition energy to estimate the power consumption of the circuit. To generate the characterizationpattern, we apply the polynomial simulation to get the informtion of the circuit. And then use Power-Mill to calculate the energy consumption of each pattern. After getting the energy consumption of each pattern, we apply three methods to approach the node transition energy and create the database, which contains the transition energy of each node. Using this method, it is about 200-300 times faster than Power-Mill to calculate the power consumption of a circuit. We test 3 kinds of input patterns for ISCAN benchmark circuiut. Experimental results on these testing show that the power estimation based on our method provides within 3.32% average error for any input pattern, and the method provides within 7.2% max error.