標題: 以厚膜光阻技術製備高縱橫比銅導柱之研究
Fabrication of High Aspect Ratio Copper Interconnect Using Thick-film Photoresist Process
作者: 張瑞宗
R. C. Chang
謝宗雍
T. E. Hsieh
材料科學與工程學系
關鍵字: 厚膜光阻;微影成像;導孔;脈衝電流
公開日期: 1998
摘要: 本實驗以微影成像技術(Lithography)在厚膜光阻(Thick-film Photoresist)上形成導孔(Vias),輔以脈衝電流電鍍(Pulse Electroplating)填滿導孔以形成銅導柱,將光阻去除即可得到高縱橫比(Aspect Ratio)的銅導柱。本實驗就厚膜光阻成型、微影成像技術以及脈衝電流電鍍條件的研究,以改進銅導柱之形貌。 在厚膜光阻成型上,實驗結果顯示以旋塗機做多重光阻旋轉塗佈,可以得到厚度達42微米以上且表面粗糙度小於2%的厚膜光阻;此外以90°C做光阻軟烤(Soft Bake)利用增加軟烤時間可以充分去除光阻中的溶劑。在微影成像中,光阻厚度越厚,則所需的曝光時間與顯影時間也越長,對42μm厚的光阻而言,最佳曝光與顯影時間分別為7分鐘與3分鐘。在脈衝電流電鍍銅導柱上,脈衝頻率(Frequency)越高,正向週期(Duty Cycle)越接近0.5,電鍍銅層表面粗糙度越小,以最佳脈衝電鍍條件進行導孔電鍍,可以得到高度達42μm以上,縱橫比達4的銅導柱。
In this work, we formed vias in thick-film photoresist and filled the vias by pulse electroplating process to fabricate the copper(Cu) interconnect with high aspect ratio. The deposition of thick film photoresist, conditions of lithography and pulse electroplating were studied and their effects on the morphology of Cu interconnect were investigated. The photoresist of thickness up to 42μm and roughness less than 2% could be made by multi-coating process. By adequately increasing the time span of soft bake at 90°C, the solvent in photoresist can be eliminated completely. In photo-lithography, the exposuring and developing times increased as the thickness of photoresist increased. For the photoresist of 42μm thickness, the optimum exposuring and developing times were 7 and 3 mins, respectively. In the part of pulse electroplating, the roughness of Cu layer decreased as the pulse frequency was increased and the duty cycle was closer to 0.5. By filling the vias in photoresist with the pulse plating process, we were able to obtain the Cu interconnects with height over 40μm and aspect ratio 4.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT870159015
http://hdl.handle.net/11536/63918
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