N與P通道快閃記憶體性能與可靠性之比較研究

Abstract

近年來，快閃式記憶體廣泛地應用於可攜式電子產品的資料儲存上，例如數位相機與手提電腦。過去，快閃式記憶體產品的設計多採用n通道快閃式記憶元件。然而，通道熱載子寫入操作所需的高電壓導致大量的功率消耗。另一方面，p通道快閃式記憶元件中採用價帶-導帶間穿隧機制引發熱載子注入作為寫入操作方式可獲得低功率消秏的好處，這個優點使p通道快閃式記憶元件成為未來快閃式記憶體的發展方向。 在本論文中，我們針對n通道與p通道快閃式記憶元件的性能與可靠性作一廣泛地研究與比較。就熱載子所導致可靠性問題及其退化機制也作了深入地探討。結果顯示，雖然n通道快閃式記憶元件具備較高的電子移動率，但p通道快閃式記憶元件卻具備了較佳的可靠性與較低的功率消耗。這些優點符合未來元件小型化的要求，使得p通道快閃式記憶元件在未來快閃式記憶體應用上是非常有希望的選擇。另外，針對在p通道快閃式記憶元件中嚴重的汲極干擾現象，我們也提出兩種改善方法。一種方式是在元件結構中加入Double-Diffused Drain (DDD) 結構來降低閘極注入電流，另一種方式是採用DINOR或NAND的陣列結構。這些方法都可以作為快閃記憶體在設計上的指引。

Recently, the flash memory has received much attention for application to the digital cameras and hand-held computers as a portable mass storage. In the past, n-channel flash cells were used in the design of flash memory products. However, the requirement of high voltage operation for channel-hot-electron program results in a large power consumption. On the other hand, p-channel flash cells can achieve the advantage of low power operation by using band-to-band tunneling induced hot electron injection (BTB) as programming method, and this makes p-channel cells become the future trend of flash memories. In this thesis, a comprehensive study of n- and p-channel flash cells in terms of performance and reliability is presented. The degradation mechanisms of hot-carrier induced reliability problems in n- and p-channel flash cells are also investigated. Although the n-channel flash cell exhibits higher electron mobility, the p-channel flash cell is most advantageous with features such as better reliability and lower power consumption. These meet the scaling trend such that it is a promising candidate for the future flash memory applications. However, p-channel flash memory has serious drain disturb problem. Therefore, the drain-disturb issue has been studied extensively. Here, we propose two approaches to improve the drain disturb of p-channel flash cell. One is by using Double-Diffused Drain (DDD) structure to decrease junction gate current injection, and the other one is by choosing DINOR or NAND structure. These can be used as a design guideline for flash memory device and circuit designers.