標題: 以DSP/CPLD實現簡化定子電阻補償達成感應馬達低速運轉
The Simplified DSP/CPLD-Based Resistor Compensation for the Induction Motor under Low Frequency Operation
作者: 陳永生
TAN ENG SENG
徐保羅
Pau-Lo Hsu
電控工程研究所
關鍵字: 感應馬達;低速運轉;空間向量脈寬調變;定子電阻;補償法;數位訊號處理器;CPLD;DSP;SVPWM;Induction Motor;Low frequency;compensation;stator resistor
公開日期: 1998
摘要: 本文將CPLD與DSP硬體結合起來使用,並且成功地以此實現了簡化方式的定子電阻補償法,在三相交流感應馬達中達到有載低速運轉。在有載變化不常的情況下,如此的補償法有效的控制電源使用率,且可提升電壓及節省能源,使馬達在低於1.5Hz轉速時,依然可承受補償前扭矩負載的4~5倍。此簡化定子電阻補償法,必需先在空間向量脈寬調變(SVPWM)中規劃一番,讓DSP方便讀取運算時所需的資料。在CPLD晶片內完成最佳化空間向量脈寬調變產生器,如此可以減少低諧波以及切換次數,晶片內有即時變頻功能,且可改變切換頻率至10~20KHz,也可調整Dead-time大小,更可讓外界直接輸入補償或提升電壓使用率。而在DSP晶片內,只需一條電流迴授即可完成簡化式補償法的運算,還可以儲存各種波形,提供觀察與設計的方便。以上的設計過程,皆在軟體和硬體的互相搭配下,以模擬和實驗的互動比較方式,來驗証本文所提出的低頻補償法應用在SVPWM的可行性,並在最後得以驗証成功。
This thesis presents a newly simplified design of the resistor compensation of the induction motor under the load at the low speed. The simplified compensation and realization based on the space-vector PWM are also presented by using the CPLD and DSP chips. Under the load change situation, the voltage utilization of this compensation method is well controlled. It also reduces the current harmonic and the switching loss by using the optimal space-vector PWM in this study. The V/f concept is used for deriving the relation between the compensated voltage and the modulation inside the space-vector PWM. With the measured stator resistor of the induction motor, the proposed system only requires one-line stator current feedback to achieve the compensation. It is shown that by using the proposed method, the speed of the induction motor can be controlled down to 1.5Hz with more than 5 times load torque than that before compensation.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT870591107
http://hdl.handle.net/11536/64993
顯示於類別:畢業論文