在僅用快取記憶體多處理機系統中降低記憶體存取延遲方法的研究及其模擬評估環境之研製

Abstract

僅用快取記憶體多處理機架構主要是為了當應用程式所需的記憶體空間超過處理機上的快取記憶體時，可以利用AM來降低遠端記憶體存取的次數。很不幸地，僅用快取記憶體多處理機架構也會造成許多記憶體存取的負擔。例如遷移性分享會造成許多不必要的記憶體存取動作。僅用快取記憶體多處理機架構會有不必要的AM存取動作，而這些不必要的AM存取動作會增加記憶體存取時間。另外，AM的低使用率也會影響系統的整體效能並增加遠端記憶體存取的次數。在本論文中，我們提出方法來降低遷移性分享的影響。我們利用Invalidation Cache來省略不必要的AM記憶體存取，以提早遠端記憶體存取的動作。我們也利用叢集的觀念來設計僅用快取記憶體多處理機架構。透過叢集的方式，我們增加了AM的使用率並降低遠端記憶體存取。最後，我們將這些方法整合在一起，在我們的評估結果，這種整合的方法平均可以降低39%的執行時間。詳細的設計原理與效能評估將在論文各章節中一一的說明。

F-COMA is designed to reduce memory access latencies while program working set exceed the processor cache size. Unfortunately, there are many memory access overhead in F-COMA. For example, migratory sharing patterns will induce superfluous memory request. Some of the AM accesses are unnecessary in F-COMA and they will delay the remote memory accesses. Furthermore, if AM utilization is small, it will cause many memory access misses and increase many remote memory accesses. In this thesis, we propose two migratory sharing detection methods to decrease its influence. Next, we use invalidation cache to omit the unnecessary AM accesses and advance the memory accesses. Then, we use cluster-base F-COMA to increase AM utilization and reduce memory access misses. Finally, we combine these methods to improve the performance of F-COMA. Based on our evaluation results, we have shown that the combined methods speedup the total performance about 39% in average under SPLASH benchmarks. The detailed information about design principles and performance evaluations will be described in the literature.