完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 游朝傑 | en_US |
dc.contributor.author | Chao-Jie Yio | en_US |
dc.contributor.author | 魏哲和 | en_US |
dc.contributor.author | Dr. Che-Ho Wei | en_US |
dc.date.accessioned | 2014-12-12T02:23:12Z | - |
dc.date.available | 2014-12-12T02:23:12Z | - |
dc.date.issued | 1999 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT880428064 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/65703 | - |
dc.description.abstract | 本論文主要分析同調延遲鎖定式碼追蹤迴路 (Coherent Delay-Locked Code Tracking Loop),並在配合不同的載波相角估測方法下加以比較。依據寬頻分碼多重進接上鏈的參數設定所得出的模擬結果顯示,只利用以往的導引信號來預估 (Prediction)的載波相角估測方法遠比要利用未來的導引信號來內插 (Interpolation)的載波相角估測方法,不論在加成性白色高斯雜訊或衰減通道下都有更好的表現。我們也比較了幾種不同的預估方法,發現改良型的預估機制比其他方法的表現還好,而硬體複雜度卻幾乎沒有明顯的增加。 | zh_TW |
dc.description.abstract | Coherent delay-locked code tracking loop (CDLL) with different carrier phase estimation methods are analyzed. Computer simulation based on FDD mode of 3GPP proposals for W-CDMA uplink shows that the jitter performance of CDLL with phase estimate by prediction methods is much better than that by interpolation methods over AWGN and fading environments. It is also shown that a modified prediction method has superior jitter performance than other commonly used prediction methods with moderate hardware complexity, such as linear extrapolation or zero-th order Gaussian interpolation method. List of Figures………………………………………………………………3 List of Tables……………………………………………………5 Chapter 1 Introduction 6 1.1 Thesis Background 6 1.2 Thesis Outline 7 Chapter 2 DS-CDMA Communication Systems and Channel Model 9 2.1 Frame Format Design 9 2.1.1 Pilot Signals 9 2.2 Transmitter model 12 2.2.1 Spreading Codes 12 2.2.2 Modulation 16 2.3 RAKE Receiver 16 2.3.1 Code Acquisition 17 2.3.2 Code Tracking 17 2.4 Channel Model 19 Chapter 3 Delay-Locked Code Tracking Loop 22 3.1 System Description of Code Tracking Loop 22 3.2 Noncoherent Delay-Locked Code Tracking Loop 26 3.2.1 Noncoherent DLL 26 3.2.2 Noncoherent TDL 30 3.3 Coherent Delay-locked Code Tracking Loop 31 Chapter 4 Carrier Phase Estimation 37 4.1 Gaussian Interpolation 37 4.2 WMSA Channel Estimation 41 4.3 Linear Extrapolation Method 43 4.4 Phase Estimation by Prediction Method 45 Chapter 5 Computer Simulation 47 5.1 Simulation Model and Simulation Parameters 47 5.2 S-curve and Optimal K 51 5.3 Comparison of WMSA and Linear Gaussian Interpolation Method 53 5.4 Comparison Between Carrier Phase Prediction Methods in CDLL 56 Chapter 6 Conclusion 58 | en_US |
dc.language.iso | en_US | en_US |
dc.subject | pilot-assisted | zh_TW |
dc.subject | coherent | zh_TW |
dc.subject | delay-locked loop | zh_TW |
dc.subject | DS-CDMA | zh_TW |
dc.subject | carrier phase estimation | zh_TW |
dc.subject | code tracking | zh_TW |
dc.subject | 導引信標輔助 | en_US |
dc.subject | 同調 | en_US |
dc.subject | 延遲鎖定迴路 | en_US |
dc.subject | 分碼多重進接 | en_US |
dc.subject | 載波相角估測 | en_US |
dc.subject | 碼追蹤 | en_US |
dc.title | 分碼多重進接通訊系統中導引信標輔助之碼追蹤技術研究 | zh_TW |
dc.title | Pilot-Assisted Coherent Delay-Locked Loop for DS-CDMA Communication Systems | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |