溫差液相沈積氟氧化矽技術之研發與其在銅/低介電常數材料嵌刻導線製程上之應用

Abstract

本論文研究一種新的絕緣膜沈積技術-溫差液相沈積氟氧化矽。研究的目的，是要解決多層導線的訊號傳送延遲的問題。 首先，我們開發出一種新穎的溫差液相沈積氟氧化矽技術。與傳統的液相沈積技術，即利用加水使氫氟矽酸溶液超飽和所沉積之氟氧化矽膜相比，溫差液相沈積氟氧化矽膜具有較高含氟量(7.0-8.9 atom %)、較低之介電常數(3.46-3.66) 、薄膜應力(43-73 MPa)與較佳之熱穩定性/抗濕性。 其次，我們設計並成功組裝一部嶄新的整合式液相沈積設備。與傳統手動式設備相比，其特點是晶圓清洗槽、藥品泡製槽與薄膜沈積槽整合在一超潔淨(Class 1)的濕式處理台內。藥品泡製槽與薄膜沈積槽以管路系統相連接，該管路系統以可程式邏輯控制器(PLC)控制。操作人員只需要以按鈕啟動程式化的功能鍵即可完成主要的程序，包括過濾藥品與過濾後的管路自動清洗。該設備所成長的膜質極佳，特別是在低電場(2 MV/cm)的漏電流約為2×10-9 A/cm2，約為傳統(設備沈積的)薄膜之漏電流的十分之一。 接著我們實際將溫差液相沈積氟氧化矽應用為銅導線間介電質。我們發現銅/氟氧化矽(單層)嵌刻導線的熱穩定性並不理想，僅有400℃，其可能原因是氟氧化矽在蝕刻和化學機械研磨過程受到損害變得容易吸水。為改進該導線的熱穩定性，我們在介電質蝕刻後對氟氧化矽溝槽進行N2O電漿退火處理。實驗結果顯示，導線的熱穩定性達到500℃。顯然N2O電漿退火處理可以有效消除製程過程氟氧化矽受到的損害，並提高銅導線的熱穩定性。 介電常數低於3的旋覆式介電質methyl silsesquioxane (MSQ)在未來非常有潛力取代現在正投入量產的氟氧化矽，成為銅導線間介電質。MSQ具有類似二氧化矽的Si-O網狀結構(network)和大量的碳氫雜質(以Si-CH3鍵存在)。要將溫差液相沈積氟氧化矽技術應用在銅導線/MSQ嵌刻製程中，第一個製程步驟就是MSQ活性離子蝕刻。因此我們研究以氟碳電漿蝕刻MSQ薄膜。我們發現以適合蝕刻二氧化矽之低氟碳比的電漿蝕刻MSQ後，發現其溝槽空間有一異常的突出形狀。我們提出了可能的機制解釋這個異常的蝕刻圖形。我們也發現要得到較好的蝕刻圖形，必須以較高氟碳比的電漿蝕刻。 MSQ因為含有大量的碳氫雜質，容易在蝕刻後去光阻的灰化(ashing)過程被嚴重劣化。為改善這個問題，我們提出了一個新穎的側壁覆蓋(sidewall capping)製程。在MSQ溝槽結構經蝕刻成形後，先以乾式電漿與濕式蝕刻的方式去除側壁上的氟碳聚合物，再以選擇性液相沈積，僅在MSQ溝槽的側壁成長一層氟氧化矽作為覆蓋層，以保護MSQ在後續的灰化過程不會被劣化。實驗結果該側壁覆蓋製程可以有效解決灰化所引起的膜質劣化的問題。 在銅導線嵌刻結構中，通常銅與介電質之間需要一層阻障層防止銅穿透至介電質，以避免介電質的漏電。為解決這個漏電的問題，我們提出了以液相沈積氟氧化矽配合後續的氨氣電漿退火處理作為阻障介電層的新穎技術。物性(二次離子質譜儀)與電性(time-dependent dielectric breakdown, TDDB)的測試結果顯示，這層阻障介電層確實具有良好的阻障特性，主要原因是在氨氣電漿退火處理後，氟氧化矽表面形成一層氮氧化矽層(SiON)。 由本研究的結果證實了溫差液相沈積氟氧化矽技術在銅導線/低介電常數材料嵌刻製程上確實極具應用價值。

In this thesis, temperature-difference-based liquid-phase deposition (TD-LPD) technology is developed to resolve the interconnection RC delay issue. At first, TD-LPD technology for preparing low-k (k~3.46) SiOF film is developed and investigated in detail. Compared with conventional LPD film with water as the supersaturation initiator, TD-LPD film not only has a low dielectric constant (3.46-3.66) but also shows low tensile stress (43-73 MPa). This reveals that TD-LPD method is superior to the conventional LPD method in preparing low-k and low-stress SiOF film. Next, integrated LPD equipment with programmable operation capability is successfully developed. A clean module, a saturation tank, and a deposition tank are integrated in this equipment. The cleanliness inside the equipment space is of Class 1 grade. The operation of the integrated LPD equipment is friendly. The excellent performance of integrated LPD equipment has been verified. We then apply the TD-LPD SiOF as IMD for Cu wire. Though the SiOF film is quite stable, however, the thermal stability of the interconnection is not satisfied, probably due to that the SiOF trench is damaged during reactive ion etching and/or chemical-mechanical polish. To improve the thermal stability, N2O-plasma annealing is applied on the SiOF trench. The interconnection with N2O-plasma annealing achieves 500oC. Obviously, N2O-plasma annealing is an effective solution for the process-induced damage. In the near future, ultra-low-k (<3) dielectrics methylsilsesquioxane (MSQ) is expected to gradually replace SiOF. We thus attempt to apply the TD-LPD SiOF film as a capping layer on MSQ as an inter-Cu-metal dielectric. To be integrated with Cu using damascene process, the MSQ film must be first patterned into trenches to facilitate formation of Cu wires. However, there are primary two key issues in patterning MSQ. One issue is that the etching technology for MSQ has not been well developed. The other issue is that the MSQ can be easily degraded in the resist ashing step. Reactive ion etching of MSQ trench with CF4/CHF3 flow rate ratio as a parameter is thus studied. For CF4/CHF3 flow rate ratio of 0.5, the etching profile is peculiar with hillock in the trench space. The peculiar profile is not observed for SiO2 trench. For a high CF4/CHF3 flow rate ratio of 2, the etching profile is normal. This result reveals that CF4/CHF3 flow rate ratio of 2 is a suitable condition for MSQ trench etching. The mechanism for the peculiar etching profile has also been clarified. Ashing-induced degradation on MSQ is also a critical issue for Cu/MSQ integration. To resolve the issue, we has proposed and demonstrated a novel sidewall capping technology for preparing degradation-free MSQ trenches. Prior to resist ashing, a layer of SiOF film is selectively deposited onto the sidewalls of MSQ trenches using TD-LPD. This novel sidewall capping technology has been verified effective in resolving the ashing-induced degradation problem. Finally, a novel barrier dielectric liner prepared by TD-LPD and NH3-plasma annealing for a reliable Cu/MSQ damascene integration is proposed and qualified. Secondary ion mass spectroscopy and time-to-dielectric-breakdown (TDDB) results demonstrate that the liner can effectively block Cu penetration. Thermal stability of Cu/liner stack achieves 550℃. The mechanism of the barrier property is due to formation of the surface (10~13 nm) SiON layer on SiOF film after NH3-plasma annealing. The liner as a capping is thus very promising to be applied on Cu/MSQ interconnection. Results in this thesis demonstrate that TD-LPD is indeed a highly promising technology for application in damascene processes of Cu/low-k dielectric interconnection. Abstract (in English)…………………………………………………………...……..iii Acknowledgement…………………………………………………………………….v Contents…………………………………………………………………………...…..vi Table Captions ……………………………….………………………………………viii Figure Captions ……………………………………………………………...……..…ix Chapter 1 Introduction and Thesis Organization 1.1 Background and Motivation……………………………………………………….1 1.2 Thesis Organization………………………………………………………………..4 Chapter 2 Newly Developed Low-K and Low-Stress SiOF Film Utilizing Temperature-Difference-Based Liquid-Phase Deposition Technology 2.1 Introduction………………………………………………………………………6 2.2 Experimental……………………………………………………………………...8 2.3 Results and Discussion……………………………………………………………9 2.3.1 Comparison of Properties between TD-LPD and C-LPD Films………………..9 2.3.2 Optimal Deposition Temperature for TD-LPD…………………………………10 2.3.3 Reliability of TD-LPD Film as Intermetal Dielectric………………………….16 2.4 Summary…………………………………………………………………………21 Chapter 3 Development of Integrated Liquid-Phase Deposition Equipment 3.1 Introduction………………………………………………………………………39 3.2 Operation and Disadvantages of Manual LPD Equipment………………………40 3.3 Newly Developed Integrated LPD Equipment …………………………………..41 3.4 Procedures for Evaluation of Equipment Performance…………………………..43 3.5 Results and Discussion…………………………………………………………...43 3.6 Summary ………………………………………………………………………...45 Chapter 4 Thermal Stability of Cu/LPD SiOF Damascene Interconnection 4.1 Introduction………………………………………………………………………55 4.2 Experimental……………………………………………………………………..56 4.3 Results and Discussion…………………………………………………………...58 4.4 Summary…………………………………………………………………………60 Chapter 5 Reactive Ion Etching of Methylsilsesquioxane using CF4/CHF3 Feedgas Chemistries 5.1 Introduction………………………………………………………………………73 5.2 Experimental……………………………………………………………………..73 5.3 Results and Discussion…………………………………………………………...75 5.4 Summary…………………………………………………………………………78 Chapter 6 Innovative Sidewall Capping Technology for Degradation-Free Damascene Trenches of Low-K Methylsilsesquioxane 6.1 Introduction ……………………………………………………………..………86 6.2 Experimental ………………………………………………………..…………..87 6.3 Ashing-Induced Degradation…………………………………………..………..89 6.4 SEM Investigation of Degradation-Free MSQ Trenches ………………………90 6.5 Step Coverage of LPD Film …………………………………………………….90 6.6 Effect of Sidewall Cleaning on MSQ …………………………………………..91 6.7 Effectiveness of Sidewall Capping ……………………………………………..92 6.8 Discussion on Multilevel Integration with Sidewall Capping Technology …….93 6.9 Summary ………………………………………………………………………..93 Chapter 7 Novel Barrier Dielectric Liner Prepared by Temperature- Difference-Based Liquid-Phase Deposition and NH3-Plasma Annealing 7.1 Introduction………………………………………………………………………105 7.2 Experimental …………………………………………………………………….106 7.3 Verification of Barrier Property …………………………………………………107 7.4 Effect of Annealing Time on Barrier Property …………………………………..110 7.5 Application of Thin Barrier Dielectric Liner as a Capping on MSQ ……………111 7.6 Summary …………………………………………………………………………113 Chapter 8 Conclusions and Future Works 8.1 Conclusions …………………………………………………………………….123 8.2 Suggestions for Future Work …………………………………………………...126 References ……………………………………………………………………...….129 Vita …………………………………………………………………………………140 Publication Lists …………………………………..………………………...…….141 Table Captions Table 2-1 Comparison of fluorine concentration, dielectric constant, and film stress between TD-LPD and C-LPD SiOF films. Table 3-1 Programmed functions and their detailed sequences for the integrated LPD equipment. Table 4-1 The process parameters for two-step CMP Table 4-2 Summary of plasma annealing conditions. Table 7-1 Concentrations of main elements on the surfaces of two separate LPD films with/without NH3-plasma annealing. Figure Captions Chapter 2 Fig. 2-1 Flow diagram for TD-LPD process. Fig. 2-2 RABT flow diagram with denotation of films at different stages. Fig. 2-3 Deposited thickness as a function of deposition time. Fig. 2-4 Deposition rate as a function of deposition temperature. Fig. 2-5 (a) FTIR spectra for films deposited at 15, 25 and 35℃. The insert Table shows the position and the FWHM for the Si-O-Si stretching peak. (b) Si-F and OH bond densities as a function of deposition temperature. Fig. 2-6 The dielectric constant for variously treated films as a function of deposition temperature. Fig. 2-7 The stress as a function of deposition temperature for the as-deposited and the annealed films. Fig. 2-8 (a) J-E characteristics for films deposited at 15, 25, and 35℃. (b) Distributions of current density at 2 MV/cm for the as-deposited films (solid symbols) and the annealed films (empty symbols), with deposition temperature as a parameter. Fig. 2-9 Dielectric constant of TD-LPD film during RABT. Fig. 2-10 Total stress of TD-LPD film during RABT. Fig. 2-11 (a) The curves of current density versus electrical field, and (b) the distributions of current density at 2 MV/cm, for various films. Fig. 2-12 TDS spectra for the as-deposited film with a thickness of 260 nm. The first HF peak has been magnified by 3 times (3x) and replotted in the inset. Fig. 2-13 TDS spectra for the 1st boiled film with a thickness of 260 nm. The HF spectrum has been magnified by 3 times (3x). Fig. 2-14 Si-F peak area ratio during RABT. Fig. 2-15 Si-F peak area ratio as a function of annealing temperature. Chapter 3 Fig. 3-1 (a) Schematic front view of the manual LPD equipment, (b) schematic side view of the manual LPD equipment. Fig. 3-2 (a) Schematic diagram of the developed integrated equipment, and (b) the layout of cleaning tank, Tank A, Tank B, and the HF drain. Fig. 3-3 Schematic diagram of the chemical piping system in the integrated LPD equipment. Fig. 3-4 Schematic diagram demonstrating the positions measured by particle counter. The inserted table shows the measured particle number per cubic foot (>0.3 mm) at the positions. Fig. 3-5 (a) The particle number as a function of particle size range, and (b) the number of particle with a diameter greater than 0.5 mm on 100nm LPD film prepared by different LPD equipments. Fig. 3-6 The thickness as a function of P-etch time for LPD films prepared by different LPD equipments. Fig. 3-7 The lognormal plot of leakage current density at E=2MV/cm for different LPD films annealed at 400oC for 30min. Chapter 4 Fig. 4.1 The process steps for Cu/LPD SiOF damascene interconnection . Fig. 4-2 Schematic top views of Cu/LPD SOF damascene interconnection after the following process step, (a) Cu CMP, (b) via wet etching , and (c) Al pad etching. Fig. 4-3 The SEM cross-sectional view of Cu wire inlayed in LPD SiOF trench. Fig. 4-4 The OM top view of the Cu interconnect. Fig. 4-5 The sheet resistance of Cu wire inlayed in SiOF trench as a function of annealing temperature. Fig. 4-6 OM top views of Cu wires (a) before thermal stress, and (b) after 450oC thermal stress. The linewidth of wire is 2 mm. Fig. 4-7 The sheet resistance of Cu film on LPD SiOF film as a function of annealing temperature. The inset schematically demonstrates the measurement of sheet resistance using 4-point probe. Fig. 4-8 The sheet resistance of Cu film on RIE-treated SiOF film as a function of annealing temperature. Fig. 4-9 The SIMS depth profiles of fluorine for LPD SiOF with/without plasma annealing. Fig. 4-10 The sheet resistance of Cu wire inlayed in SiOF trench with N2O-plasma annealing as a function of annealing temperature. Chapter 5 Fig. 5-1 The etch rate as a function of CF4/CHF3 ratio for MSQ and SiO2. Fig. 5-2 (a) XPS spectra of C 1s for the MSQ and SiO2 films partially etched at a CF4/CHF3 ratio of 0.5, (b) the polymer thickness as a function of CF4/CHF3 ratio for the both films. Fig. 5-3 SEM cross-sectional pictures of MSQ trench etched at CF4/CHF3=0.5 for the pitch size being (a) 1.2 mm, (b) 1.6 mm, (c) 2.0 mm, and (d) 4.0 mm. Fig. 5-4 SEM cross-sectional pictures of MSQ trench etched at CF4/CHF3=1 for the pitch size being (a) 1.2 mm, (b) 1.6 mm, (c) 2.0 mm, and (d) 4.0 mm. Fig. 5-5 SEM cross-sectional pictures of MSQ trench etched at CF4/CHF3=2 for the pitch size being (a) 1.2 mm, (b) 1.6 mm, (c) 2.0 mm, and (d) 4.0 mm. Fig. 5-6 SEM cross-sectional pictures of SiO2 trench etched at CF4/CHF3=0.5 for the pitch size being (a) 2.0 mm, and (b) 4.0 mm. Fig. 5-7 Schematic diagram of deflected ions and reflected ions into the trench space. Chapter 6 Fig. 6-1 Schematic demonstration of ashing-induced degradation on the MSQ trench sidewall in the conventional patterning and resist-stripping process. Fig. 6-2 Cross-sectional SEM images for MSQ trenches after (a) trench patterning, (b) sidewall cleaning, (c) sidewall capping and (d) resist stripping. Fig. 6-3 FTIR spectra for MSQ film before and after ashing. Fig. 6-4 (a) Dielectric constant, (b) leakage current density, and (c) thickness for MSQ film before and after ashing. Fig. 6-5 Cross-sectional SEM images for MSQ trenches after (a) trench patterning, (b) sidewall cleaning, (c) sidewall capping and (d) resist stripping. Fig. 6-6 SEM cross-sectional views of LPD SiOF films deposited on a PECVD oxide trench. Fig. 6-7 MSQ thickness as a function of O2-plasma cleaning time. Fig. 6-8 MSQ film thickness as a function of wet cleaning time with O2-plasma cleaning time as a parameter. Fig. 6-9 SEM cross-sectional picture of MSQ trench without wet cleaning after sidewall capping. Fig. 6-10 FTIR spectra of MSQ film with capping before/after ashing. Fig. 6-11 TDS spectra of H2O for the MSQ trenches with/without sidewall capping after ashing. Chapter 7 Fig. 7-1 SIMS depth profiles of Cu and N elements for LPD films with/without NH3-plasma annealing after Cu drive-in by (a) 500oC annealing, or (b) BTS. Fig. 7-2 XPS spectra of (a) N 1s and (b) Si 2p for LPD films with/without NH3-plasma annealing. Fig. 7-3 J-E characteristics with stress temperature as a parameter for (a) the Cu-gate capacitors with NH3-plasma annealing, and (b) the Cu-gate capacitors without NH3-plasma annealing. Fig. 7-4 Typical TDDB characteristics for Cu-gate capacitor with NH3-plasma annealing and that without NH3-plasma annealing. The characteristic for Al-gate capacitor (without plasma annealing) is also shown for comparison. The stress condition is set at 250℃, +2 MV/cm. Fig. 7-5 The distributions of TDDB lifetime as a function of NH3-plasma annealing time. The stress condition is 250oC, 2MV/cm. Fig. 7-6 The nitrogen depth profiles in the LPD films with different NH3-plasma annealing times. Fig. 7-7 (a) typical characteristics of current density versus electrical field, and (b) the distributions of current density at 1 MV/cm, for 480 nm MSQ, MSQ capped with 30 nm liner, and MSQ capped with 60 nm liner. Fig. 7-8 The (effective) dielectric constants for MSQ, 60 nm liner, 480nm MSQ capped with 30nm liner, and 480nm MSQ capped with 60nm liner.