標題: | Power-Efficient Pipelined Reconfigurable Fixed-Width Baugh-Wooley Multipliers |
作者: | Tu, Jin-Hao Van, Lan-Da 資訊工程學系 Department of Computer Science |
關鍵字: | Baugh-Wooley algorithm;full-precision multiplier;fixed-width multiplier;pipeline;power efficient;reconfigurable |
公開日期: | 1-十月-2009 |
摘要: | In this paper, we propose a pipelined reconfigurable fixed-width Baugh-Wooley multiplier design framework that provides four configuration modes (CMs): n x n fixed-width multiplier, two n/2 x n/2 fixed-width multipliers, n/2 x n/2 full-precision multiplier, and two n/4 x n/4 full-precision multipliers. Furthermore, low-power schemes including gated clock and zero input techniques are employed to achieve the power-efficient pipelined reconfigurable design. The presented power-efficient pipelined reconfigurable fixed-width multiplier design not only generates a family of widely used multipliers but also leads to 10.59, 21.7, 28.84, and 31.58 percent power saving, on average, for n = 8, 16, 24, and 32, respectively, compared with that of the pipelined reconfigurable fixed-width multiplier without using the low-power schemes. On the other hand, compared with non-reconfigurable pipelined multiplier, we can save 0.81, 12.46, 17.93, and 23.2 percent power consumption, respectively, for n = 8, 16, 24, and 32. |
URI: | http://dx.doi.org/10.1109/TC.2009.89 http://hdl.handle.net/11536/6588 |
ISSN: | 0018-9340 |
DOI: | 10.1109/TC.2009.89 |
期刊: | IEEE TRANSACTIONS ON COMPUTERS |
Volume: | 58 |
Issue: | 10 |
起始頁: | 1346 |
結束頁: | 1355 |
顯示於類別: | 期刊論文 |