完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Wei-Chen | en_US |
dc.contributor.author | Lin, Horng-Chih | en_US |
dc.contributor.author | Chang, Yu-Chia | en_US |
dc.contributor.author | Huang, Tiao-Yuan | en_US |
dc.date.accessioned | 2014-12-08T15:08:41Z | - |
dc.date.available | 2014-12-08T15:08:41Z | - |
dc.date.issued | 2009-09-28 | en_US |
dc.identifier.issn | 0003-6951 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1063/1.3238362 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/6652 | - |
dc.description.abstract | A polycrystalline-Si thin-film transistor configured with independent double-gated structure and ultrathin channel film is proposed for use as a Si-oxide-nitride-oxide-Si memory device. Taking advantage of additional control gate bias offered by the independent double-gated scheme in addition to the driving gate, this work demonstrated that the reading window and programming efficiency can be improved by applying a proper control gate bias. It is also found that the relationship between programming/erasing speed and control gate bias is strongly related to channel film thickness. Our results indicate that the independent double-gated device possesses promising potential for future nonvolatile memory applications. (C) 2009 American Institute of Physics. [doi: 10.1063/1.3238362] | en_US |
dc.language.iso | en_US | en_US |
dc.title | Effects of independent double-gated configuration on polycrystalline-Si nonvolatile memory devices | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1063/1.3238362 | en_US |
dc.identifier.journal | APPLIED PHYSICS LETTERS | en_US |
dc.citation.volume | 95 | en_US |
dc.citation.issue | 13 | en_US |
dc.citation.epage | en_US | |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000270458000081 | - |
dc.citation.woscount | 6 | - |
顯示於類別: | 期刊論文 |