Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 郭清松 | en_US |
dc.contributor.author | Chin-Sng Kuo | en_US |
dc.contributor.author | 張立 | en_US |
dc.contributor.author | Li Chang | en_US |
dc.date.accessioned | 2014-12-12T02:24:46Z | - |
dc.date.available | 2014-12-12T02:24:46Z | - |
dc.date.issued | 2000 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT890159026 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/66650 | - |
dc.description.abstract | 摘要 在目前超大型積體電路的發展中,以銅做為金屬連接導線材料已成為必然的趨勢。為了克服銅與矽基材間相互擴散的問題,必須在銅與矽間鍍上具有低電阻係數、高熱穩定性及良好界面附著性的擴散阻障層。本實驗主要是在探討Ru 和 RuO2薄膜做為銅與矽之間擴散阻障層的反應,由擴散、相變化的觀點來討論其變化。所採用的鍍膜結構如下: 1. Cu(100nm)/Ru(15nm)/SiO2(10nm)/Si 2. Ru(15nm)/SiO2(10nm)/Si 3. Cu(100nm)/RuO2(15nm)/SiO2(20nm)/Si 4. RuO2(15nm)/SiO2(20nm)/Si 銅膜及阻障層以濺鍍法沉積後,對試片在400℃~700℃/ 30 分鐘的真空爐退火處理,以四點探針量測片電阻,歐傑電子能譜儀(AES)做成分縱深分析,XRD做相的鑑定,並利用穿透式電子顯微鏡(TEM)做鍍膜截面的觀察,分析各層結構的變化。 研究結果顯示這幾種不同結構在退火後有不同的行為,Cu(100nm)/Ru(15nm)/SiO2(10nm)/Si在550℃/30 分鐘退火後,電阻值開始上升,阻障層產生變化; Ru(15nm)/SiO2(10nm)/Si 在400~600℃退火後,電阻值會持續下降;Cu(100nm)/RuO2(15nm)/SiO2(20nm)/Si 在600℃/30 分鐘退火後,電阻值很明顯的上升很多,阻障層產生變化;RuO2(15nm)/SiO2(20nm)/Si 在400~700℃退火後,電阻值會持續下降。 由實驗結果可知Cu(100nm)/RuO2(15nm)/SiO2(20nm)/Si結構比Cu(100nm)/Ru(15nm)/SiO2(10nm)/Si具有較佳的熱穩定性,因退火過程中,Ru及RuO2阻障層產生變化,變化原因將於本文中討論。 | zh_TW |
dc.description.abstract | Abstract Copper is expected to be adopted in deep submicron ultra-large scale integration (ULSI) metallization due to its lower resistivity and better reliability than conventional Al alloys. Since Cu diffuses fast in Si and introduces deep-level traps , a proper diffusion barrier is needed. The barrier should have low resistivity, high thermal stability, and good adhesion with Cu and substrate. In this study, we have investigated the diffusion barrier properties of Ru and RuO2 thin films for Cu metallization in ULSI circuit device. The following structures are used: 1. Cu(100nm)/Ru(15nm)/SiO2(10nm)/Si 2. Ru(15nm)/SiO2(10nm)/Si 3. Cu(100nm)/RuO2(15nm)/SiO2(20nm)/Si 4. RuO2(15nm)/SiO2(20nm)/Si Copper and barriers were deposited by DC sputtering on Si substrates. Annealing was carried out in vacuum at temperature from 400℃ to 700℃ for 30 min . Sheet resistance was measured by a four-point probe method. Auger electron spectroscopy(AES) was used to evaluate the inter-diffusion across interfaces by the compositional depth profile. The phase identification of layers was performed by X-ray diffraction(XRD). The microstructure was investigated by cross-section transmission electron microscopy(XTEM) with X-ray energy dispersive spectroscopy(EDS). Sheet resistance measurement and microstructural characterization showed that these structures have different behaviors after annealing. Cu(100nm)/Ru(15nm)/SiO2(10nm)/Si structure was failed after 550℃/30 min annealing as a result of reaction of the barrier with Cu and Si. Ru(15nm)/SiO2(10nm)/Si structure was not failed after a 400~600℃/30 min annealing and their sheet resistances continued to decrease . Cu(100nm)/RuO2(15nm)/SiO2(20 nm)/Si structure was failed after 600℃/30 min annealing as a result of reaction of the barrier with Cu and Si. RuO2(15nm)/SiO2(20nm)/Si structure was not failed after a 400~700℃/30 min annealing and their sheet resistance continue to decrease . From the results, it is concluded that the structure of Cu/RuO2/SiO2/Si is better than the structure of Cu/Ru/SiO2/Si on the thermal stability. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 釕 | zh_TW |
dc.subject | Ru | en_US |
dc.title | 釕與二氧化釕薄膜應用於銅金屬化之擴散阻障層特性研究 | zh_TW |
dc.title | Diffusion Barrier Layer Properties of Ru and RuO2 Thin Films in Copper Metallization System | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
Appears in Collections: | Thesis |