互補式金氧半兩階式類比至數位轉換器之設計與分析

Abstract

本文描述一個附有數位修正電路的互補式金氧半兩階式類比至數位轉換器。文中對於它的主要元件包含約略比較器(coarse comparator)和精密比較器(fine comparator)有詳細的設計與分析，而其中的參考電壓產生器(reference voltage generator)是以電阻平分上下兩個電壓參考點，所使用的數位至類比轉換器則利用一組開關(switch box)配合參考電壓產生器來選擇輸出的值取代了一般需要使用運算放大器(operational amplifier)的方式。由於此類比至數位轉換器的上下參考電壓分別是1伏特和0伏特，所以輸入訊號的範圍就是由0伏特到1伏特。經由HSPICE的模擬，結果顯示此類比至數位轉換器在工作電壓3.3伏特，以每秒50個百萬取樣的速度可達到8位元的解析度。此類比至數位轉換器是以1P4M 0.35微米互補式金氧半製程來實現。因為類比至數位轉換器電路中的電容都只用P型金氧半電晶體來實現所以它的晶片面積只有1.4mm x 1.3mm。這個類比至數位轉換器電路經實際量測後得知它工作為3.3伏特, 速度為50個百萬取樣下的功率消耗小於40毫瓦特。

In this thesis, a CMOS two-step A/D converter with digital error correction circuit is described. The main components, coarse comparators and fine comparators, are designed and analyzed in detail. The reference voltage generator is a resistor ladder that divides the top and the bottom reference voltages. The D/A converter utilizes a switch box merged with the voltage generator, instead of using an operation amplifier. The top and the bottom reference voltages are 1V and 0V, respectively. So, the input voltage range of the A/D converter is from 0V to 1V. The simulation results performed by HSPICE show that the A/D converter achieves 8-bit resolution at 50M sampling rate when the supply voltage is 3.3V.The A/D converter is implemented by a 1P4M 0.35um CMOS process. The chip area of the A/D converter with pad is only 1.4mm x 1.3 mm because the capacitors in the A/D converter are formed by PMOS. The chip has been tested and the power consumption without output buffers at 3.3V, 50MSample/s is less than 40mW.