藍芽系統訊源處理元件設計

Abstract

本論文提出並實現一適合藍芽通訊訊源處理之架構。此一訊源處理器涵蓋藍芽(Bluetooth)系統中之通道編碼(Channel Coding)、存取碼(Access Code)之產生、安全防護(Security)以及跳頻頻率選擇器(Hopping Frequency Selection Kernel)。本訊源處理元件可分為三大部分：可塑線性回授轉移儲存單元(Adaptable Linear Feedback Shift Register, LFSR)、認證金匙(Authentication Key)產生器以及跳頻頻率選擇器。用來處理位元流程序(Bit-stream Process)之可塑線性回授轉移儲存單元架構有效的縮減硬體面積，也因此降低成本。認證金匙產生器利用表格對應方式來產生回合金匙(Round Key)。此一處理器之程式碼乃是可合成之Verilog碼，並經由Xilinx Foundation Series 2.li以及Synopsys Design Analyzer完成合成程序。此一程式碼亦利用1P5M 0.25um Artisan Passport Cell Library進行合成。最後的分析顯示出此訊源處理器相對於特定專用的電路架構而言，在面積上擁有較佳的表現。

An efficient architecture for wireless data processing had been developed in this thesis. The data processor handles channel coding, access code generation, security, and hopping frequency selection kernel for Bluetooth. The data processor contains three features: Adaptable Linear Feedback Shift Register (LFSR), authentication key handler and hopping frequency generator. The adaptable LFSR structure derived for bit-stream process provides less hardware and thus lower cost. The authentication key handler was designed with a table mapping based round key generator. The entire data processor is written in synthesize-able Verilog code. The code has been synthesized using Xilinx Foundation Series 2.1i, Synopsys Design Analyzer. The code has also been synthesized into 1P5M 0.25um Artisan Passport Cell Library. The area analysis reveals that the data processor had superior performance than dedicated circuits.