利用改良式暫存器交換技巧設計追溯式維特比解碼器

Abstract

迴旋碼是一種通道編碼，其經常被運用於數位通訊系統當中以降低資料傳輸的錯誤率。本論文討論了各種加-比較-選擇運算單元(add-compare-select units)的特色及其優缺點。又，在維特比解碼器架構中，實現殘存路徑解碼的方法計有兩大類：一為暫存器交換法(register-exchange approach)，另一為追溯法(trace-back approach)。而本論文針對三種暫存器交換法進行模擬；另外，相較暫存器交換法而言，追溯法所耗功率較低。在2004年，Han暨多位學者利用暫存器交換的觀念實現一個以追溯法為基礎的維特比解碼器，此方法大大地降低功率耗損以及硬體複雜度。奠基於此研究，我們進一步改進Han等學者所提出之方法。依研究結果顯示，本研究所提出的方法不僅使得功率耗損益加改善，並裨益減少晶片面積，其降低的幅度相較於Han而言，分別達9%及4%。

Convolutional code is a widely used technique in digital communication systems to reduce bit error rate. In this thesis, features, merits and demerits of several add-compare-select units (ACSUs) are discussed. Further, in the architecture of Viterbi decoder, there are two categories of survivor memory units (SMUs): register-exchange approaches and trace-back approaches. We conduct simulations of three register-exchange approaches. Moreover, trace-back approaches consume significantly less power than register-exchange ones. In 2004, Han et al. proposed a new traceback-based Viterbi decoder using modified register-exchange schemes. This approach compared to traditional trace-back approaches is good for decreasing power dissipation and silicon area. Based on Han’s approach, we further propose a modified approach. According to simulation results, our approach achieves 9% and 4% improvement in power dissipation and silicon area respectively.