標題: | 里德所羅門解碼器之通用型架構設計 Universal Arcdhitectures for Reed-Solomon Error-and-Erasure Decoder |
作者: | 張富科 Fuke Chang 張錫嘉 Hsie-Chia Chang 電子研究所 |
關鍵字: | 里德所羅門;Reed-Solomon |
公開日期: | 2004 |
摘要: | 里德所羅門碼主要用來保護資料來避免在傳輸中可能發生的錯誤,它的數學演算主要是根據有限場(finite field)的運算。 里德所羅門碼在許多應用上都有例子,譬如CD, DVD光碟機,cable modern以及DVB-T的系統。 然而在各種應用裡,因應不同的規格要求,每種里德所羅門馬有著完全不同的參數以及不同的有限場的定義和p(x)。 而以往的多模式設計,總需要花上許多的硬體和週期來處理不同有限場定義的問題。 因此本論文提出一個完全多模式的里德所羅門碼解碼器,它可以同時處理不同的參數包含可更正的錯誤和有現場的定義。 我們總共提出兩種的架構,第一種架構主要支援最高有限場次方到10,第二種架構有限場次方到8。 除此之外,我們還應用一些小面積的設計考量於次方為八的架構,使得能夠達到小面積的設計。 這兩種架構都以0.13 1P8M的製程來實現,分別需要110K和53K個邏輯閘。根據模擬的結果,最快可以達到220MHz以及250MHz的工作頻率。 Due to protecting the data form random error and burst error during transmission, Reed Solomon (RS) code has been widely accepted as the forward error correction scheme, such as xDSL, cable modem, and DVB-T. Because of the different RS specific parameters, a cost efficient RS decoder that can support various applications has practical importance to reduce the time-to-market and design costs. This thesis presents two universal architectures for Reed Solomon (RS) error-and-erasure decoder that can accommodate any codeword with different code parameters and finite field definitions. The first architecture can support the maximum degree to 10, and the second architecture can support to 8. The area efficient design approach is also considered in second architecture. Implemented with 1.2V 0.13□m 1P8M technology, the two decoders can operate at 220 MHZ and 300MHz and reach 2.2Gb/s and 2.4Gb/s data rate, respectively. The total gate counts of two decoders are 110K with core size 0.78mm2 and 54K with the core size 0.36mm2. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009211659 http://hdl.handle.net/11536/67390 |
Appears in Collections: | Thesis |
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