給低功率元件式設計使用的改良型叢聚式電壓調降法

Abstract

隨著半導體製程進步，元件尺寸縮小，積體電路可以操作在更高的頻率而達到更好的效能。但操作頻率越高意味著功率耗費的問題越大，而且尺寸縮小還會造成漏電流增加。功率消耗的問題會增加設計電池驅動類的產品之困難度，同時也會影響到一般類型產品的上市所需時間、成本、和可靠度。 CVS(叢聚型電壓調降)是一種能有效降低積體電路功率的方法。CVS是利用電路裡的多餘的寬鬆時間而將其拿來換得功率消耗的減低。以CVS為基礎之節省耗電的方法已經被研究了好幾年。我們在這篇論文裡提出一種改良的CVS方法，雙側CVS(BCVS)，同時由實驗所得的數據來研究為何我們的改進有效的原因。

As the semiconductor technologies make progress by scaling-down the feature size,integrated circuits can operate at higher frequencies and achieve higher performance. However, increasing operating frequencies means deteriorating power dissipation problems; moreover, scaling-down causes larger leakage current. Power consumption problems increase the design difficulty for battery powered applications, and also affect ordinary designs in terms of time to market, cost, and reliability. CVS (Clustered Voltage Scaling) is an effective way to reduce IC power consumption. CVS utilizes the excess time slacks inside circuits and trade them for power reduction. Methods based on CVS for saving power have been studied for years. We propose an improved CVS method, Bilateral CVS (BCVS). BCVS is a general Clustered Voltage Scaling method which subsumes both CVS and ECVS. In this thesis, we also discuss why our improvements work by experimental results.