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dc.contributor.author賴鴻志en_US
dc.contributor.authorHung-chih Laien_US
dc.contributor.author胡竹生en_US
dc.contributor.authorJwu-Shen Huen_US
dc.date.accessioned2014-12-12T02:26:31Z-
dc.date.available2014-12-12T02:26:31Z-
dc.date.issued2000en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT890591070en_US
dc.identifier.urihttp://hdl.handle.net/11536/67838-
dc.description.abstract本論文主要針對MPEG-1 Layer 3 音訊編碼標準作研究並在定點DSP晶片上實作一即時解碼器。本論文分成兩大部分,第一部分敘述MPEG-1 Layer 3 音訊編碼標準,包括壓縮與解壓縮。第二部分簡介軟硬體平台並實作出一可即時播放出音樂的即時解碼器。實作的重點包括組合語言的撰寫、定點數的運算、高效率的運算法則、多功及多執行序的管理與結果比較。此解碼器程式記憶體共使用7.1k 字元(word),資料記憶體共使用17.2k字元(word)。若以此定點晶片最快速度100 MHz執行,則此解碼器的解碼速度為34.16 MIPS,約佔此晶片34%的運算能力。zh_TW
dc.description.abstractIn this thesis, an investigation is done for MPEG-1 Layer 3 audio coding standard. A real-time implementation on a fixed-point DSP chip is also proposed. This thesis is twofold: one is to introduce the MPEG-1 Layer 3 audio coding standard, including encoder and decoder. The other is to describe software and hardware development environment and implement a real-time decoder. The keys of implementation are hand-coded in assembly language, fixed-point operation, an efficient algorithm, multi-task and multi-thread management and verification. The decoder uses 7.1 kwords of program memory and 17.2 kwords of data memory, respectively. This decoder is 34.16 MIPS and uses about 34% computation power of this DSP chip if it run at its maximum speed, 100MHz.en_US
dc.language.isoen_USen_US
dc.subjectMP3zh_TW
dc.subject定點DSPzh_TW
dc.subjectMPEG-1en_US
dc.subjectMP3en_US
dc.subjectDSPen_US
dc.titleMPEG-1 Layer 3 音訊解碼器於DSP晶片之即時軟體實現zh_TW
dc.titleReal-Time Implementation of MPEG-1 Layer 3 Audio Decoder on a DSP Chipen_US
dc.typeThesisen_US
dc.contributor.department電控工程研究所zh_TW
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