使用內嵌指令式離散小波轉換與反轉換硬體設計

Abstract

離散小波轉換的技術，已被廣泛的應用於訊號分析與影像處理的問題上。由於小波轉換後的係數呈現能量集中低頻的特性，非常適合影像資料壓縮的前處理。新的工業界標準中如JPEG2000、MPEG4已使用離散小波轉換取代離散餘弦轉換。然而由於其龐大的運算量與複雜的運算程序，造成硬體實作上無法容易實現。 基於此，本論文將針對一維一層、一維多層與二維多層離散小波轉換的硬體架構，提出內嵌指令式(Embedded Instruction Code,EIC)的設計。透過EIC的設計，除了可輕易整合離散小波轉換與反轉換之外，更可以利用模組化的設計觀念，在不同的硬體架構上實現。 我們提出的EIC設計重點為將離散小波轉換與反轉換的計算程序轉換為ALU的指令碼，在本論文中，我們分別使用了三種不同的ALU架構實現一維一層DWT。並以一維一層的硬體為基礎，配合遞迴金字塔型演算法(Recursive Pyramid Algorithm , RPA)的技巧，將EIC應用於一維多層與二維多層DWT的硬體設計。 最後藉由Synopsys與Cadence tool模擬與合成實際的晶片以後，不管在圖形處理能力、運算速度或晶片面積上皆具有不錯的表現。

The discrete wavelet transform (DWT) technique has been widely used in signal processing and image processing. Since the DWT coefficients have the property of energy conservation in the low frequency part, it is suitable for data compression. In the recent industry standard, DWT has replaced DCT which is a main approach in image compression in JPEG2000 and MPEG4. However, there are difficulties in implementation such as the heavy computation and complex operation procedures. Due to the drawback, the thesis purposes a design rule named “Embedded Instruction Code (EIC)”, as well as focus on the hardware architectures of 1-stage 1 dimension DWT, multi-stage 1 dimension DWT and Multi-stage 2 dimension DWT. Based on this rule, DWT and inverse discrete wavelet transform (IDWT) can be integrated easily. Furthermore we can use the module design concept to implement DWT by different hardware architectures. Using EIC, we can translate the computation of DWT and IDWT into the instruction codes of ALU. Moreover, the ALU architecture of 1-stage DWT is worked out by three different architectures. Besides, accompanied with “Recursive Pyramid Algorithm (RPA)” the EIC can be adopted in multi-stage 1 dimension DWT and multi-stage 2 dimension DWT. Consequently, the gate level simulation and P&R are done with Synopsys and Cadence tools. The chip has excellent advantages in the ability of image processing, execution time and chip area.