四氟化碳電漿處理改善閘極絕緣層特性在MOS元件之研究

Abstract

依據全球半導體技術藍圖的預估，未來的元件將趨向更小尺寸、更低阻抗以達到更高速度，因此將以金屬閘極取代複晶矽閘極、以高介電係數材料取代二氧化矽。受限於金屬閘極的製程，閘極氧化層必須以低溫形成，然而低溫閘極氧化層有大量缺陷存在矽基材與氧化層之介面，使得其漏電流偏高、可靠度不足。對高介電係數材料二氧化鈦(TiO2)而言，矽基材及二氧化鈦間的界面層(interfacial layer)會導致介電係數下降、界面缺陷增加、可靠度降低。 在本論文中，吾人提出先以四氟化碳(CF4)電漿對矽基材預處理後，再疊低溫閘極氧化層之低溫製程。四氟化碳電漿中的氟能修補界面處的不完全鍵結，減少界面缺陷；另外氟亦能促進低溫氧化層再鍵結而更為緻密。再者，四氟化碳電漿有蝕刻作用，適當控制後能用來去除高介電係數材料的界面層，從而改善二氧化鈦氧化層的特性。

According to International Technology Roadmap for Semiconductor, metal gates and high-k dielectrics would be used for future ultra-high speed CMOS logic technology. The formation of high quality low temperature gate oxide (i.e. negligible interface states) is required due to the temperature limitation of metal gate processes. Additionally, the interfacial layer between Si/high-k materials is a serious problem that would reduce k-value and degrade high-k film quality. In this thesis, we propose that an additional CF4 pretreatment before low temperature oxide deposition could improve interface quality and gate oxide quality. Fluorine incorporation can reduce dangling bonds and enhance re-oxidation. Moreover, because of the slight etching property of CF4 plasma, the interfacial layer between Si/high-k films could be removed. Therefore, the high-k films show good electrical characteristics like lower leakage current and better SILC effect.