標題: 一種製造於部分空乏型矽在絕緣層上之短通道金氧半場效電晶體的二維解析模式
A 2-D Analytic Model for Short-Channel MOSFET Fabricated on Partially-Depleted SOI
作者: 許勝福
HSU,SHENG-FU
吳慶源
Ching-Yuan wu
電子研究所
關鍵字: 金氧半場效電晶體;部分空乏型;SOI;Partially-Depleted;MOSFET
公開日期: 2001
摘要: 摘要 在深次微米積體電路中,由於具有低操作功率、防止輻射干擾、較小的次臨界變動及非常快的元件操作速度等等吸引人的優點,因此矽在絕緣層上之金氧半場效電晶體已被期盼可與傳統式金氧半場效電晶體一較高下.然而,由於完全空乏型矽在絕緣層上之金氧半場效電晶體受制於可能因為晶圓表面上矽導體薄層控制不均勻所造成的起始電壓之變動,因此部分空乏型矽在絕緣層上之金氧半場效電晶體在現代矽在絕緣層上之金氧半場效電晶體技術中已越來越受到大家重視. 在本篇論文中,我們討論並推導一種包含起始電壓和電流-電壓特性模型之短通道部分空乏型矽在絕緣層上之金氧半場效電晶的二維解析模式.此外,由於矽在絕緣層上之金氧半場效電晶體元件中具有非常差的功率散逸特性,因此一種名為“自我積熱效應”的嚴重缺點也將藉由二維數值分析模擬器(MEDICI)的幫助之下來得到推導及驗證.最後,本篇論文的主要貢獻及一些未來仍須做進一步的努力研究方向將在本篇論文的最後提出.
Abstract The SOI (silicon-on-insulator) MOSFET is expected to become competitive with conventional bulk MOSFET in deep sub-micrometer integrated circuits owing to its attractive device advantages such as low operation power﹐radiation hardness﹐smaller subthreshold swing﹐and very high speed performances﹐etc﹒Fully–Depleted(FD) SOI MOSFET﹐however﹐suffers from the thin silicon film across the wafer can not be controlled uniformly which results in the threshold voltage being varied dependent on the unexpected manufacturing processes variations﹒For this reason﹐a growing interests of the Partially-Depleted(PD) SOI MOSFET is the current trend in the modern SOI technology﹒ In this thesis﹐a 2-D analytic model of the short-channel PD SOI MOSFET includes the threshold voltage and I-V characteristics will be derived and discussed﹒Moreover﹐a extremely serious drawback of the SOI devices resulting from the poor power dissipation named“Self-Heating-Effect”will be modeled and verified by the aid of the 2-D numerical simulator(MEDICI)﹒Finally﹐the major contributions of this thesis and some future researches deserved further efforts are proposed﹒
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT900428040
http://hdl.handle.net/11536/68735
顯示於類別:畢業論文