完整後設資料紀錄
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dc.contributor.author張修維en_US
dc.contributor.authorHsiu-Wei Changen_US
dc.contributor.author崔秉鉞en_US
dc.contributor.authorBing-Yue Tsuien_US
dc.date.accessioned2014-12-12T02:28:11Z-
dc.date.available2014-12-12T02:28:11Z-
dc.date.issued2001en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT900428076en_US
dc.identifier.urihttp://hdl.handle.net/11536/68768-
dc.description.abstract摘要 本論文在探討高介電常數介電質薄膜二氧化鉿(HfO2)的製備與研究,藉由不同的沉積結構、電極材料、前處理方式及沉積後退火處理,來研究其對二氧化鉿薄膜性質的影響,以期對二氧化鉿的基本性質有進一步的了解,並提出沉積高介電常數介電質所須注意的方向準則。 首先從金屬-介電質-金屬電容結構量測二氧化鉿介電層本身的介電質常數,確定其介電常數為27.9。再製作金屬-介電質-半導體電容結構以量測其等效介電常數,發現其等效介電常數偏低,主要原因是二氧化鉿與矽基版界面的二氧化矽界面層。鋁電極電容的等效介電常數又低於鉑電極電容,其原因是鋁電極會與二氧化鉿形成一層界面層,研判為鋁的氧化物。而在下界面層方面,其來源為沉積時的自由基與矽基板反應形成,厚度可達3奈米以上。為了減少二氧化矽界面層的產生,嘗試使用二階段式沉積方式來改善,但發現由於氧自由基的活性很強,故改善程度有限。表面前處理對界面氧化層的降低也幫助有限。鉿金屬再氧化方式可以得到最高的等效介電常數,但仍有約1-1.5奈米的介面氧化層,研判是濺鍍腔中微量的氧所造成。 根據以上結果,反應性濺鍍二氧化鉿不適用於製備超薄閘介電層,鉿金屬再氧化輔以適當的表面處理應該是最有潛力的製程。化學器相沈積也是值得常識的技術。本論文雖未能達到理想的等效氧化層厚度,但是對於電極選擇、介面層的成長機制、沉積前後處理的影響都有廣泛的了解。提供了後續之應用的基礎,也對相關之研究有重要的參考價值。zh_TW
dc.description.abstractABSTRACT In this thesis, technique of high dielectric constant films, HfO2, deposited by physical vapor deposition method was studied. The effect of gate electrode, deposition method, post-deposition annealing, and pr-deposition surface treatment are examined extensively. The dielectric constant of PVD HfO2 was determined to be 27.9 from the metal-insulator-metal capacitor. Then, Metal-Insulator-Semiconductor (MIS) capacitor was fabricated to investigate the effective dielectric constant. A relatively low effective dielectric constant was found due to a very thick interfacial layer between HfO2 and Si-substrate. The effective dielectric constant of Al gate device is lower than that of Pt gate device. The gate effect is explained by the formation of Al2O3-like interfacial layer between Al gate and HfO2. The origin of the thick interfacial SiO2 layer is the O-radicals reactive sputtering of HfO2 film. Two-step deposition scheme, Hf followed by HfO2, was adapted to avoid the growth of interfacial SiO2 layer. However, the improvement is limited due to the very high reactivity of O-radicals. Surface treatment with NH3 or N2O annealing does not reduce interfacial SiO2 layer, too. On the other hand, re-oxidation of Hf film on HF-last Si surface results in the thinnest effective oxide thickness. A 1-1.5 nnm thick interfacial SiO2 still exists due to the traced oxygen in deposition chamber. Based on these results, it is concluded that reactive sputtering of HfO2 cannot be used to form thin gate dielectric. Re-oxidation of Hf film deposited on surface treated si substrate may be the best strategy. In this case, the oxygen content in deposition chamber must be totally eliminated. Chemical vapor deposition may be another choice to obtain ultra thin effective oxide thickness. Although ideal effective oxide thickness has not been achieved, the knowledge on the effect of process parameters provides valuable guideline to the preparation of ultra-thin gate dielectric.en_US
dc.language.isoen_USen_US
dc.subject高介電常數介電層zh_TW
dc.subject二氧化鉿zh_TW
dc.subject表面處理zh_TW
dc.subjectHigh-k dielectricen_US
dc.subjectHfO2en_US
dc.subjectsurface treatmenten_US
dc.subjectPVD deposited HfO2en_US
dc.subjectOESen_US
dc.title物理氣相沉積之二氧化鉿(HfO2)薄膜的特性研究zh_TW
dc.titleInvestigation on PVD Deposited HfO2 Filmen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
顯示於類別:畢業論文