Full metadata record
DC FieldValueLanguage
dc.contributor.author徐利君en_US
dc.contributor.author吳錦川en_US
dc.date.accessioned2014-12-12T02:28:13Z-
dc.date.available2014-12-12T02:28:13Z-
dc.date.issued2001en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT900428096en_US
dc.identifier.urihttp://hdl.handle.net/11536/68786-
dc.description.abstract本篇論文描述一個利用電流模式設計之低電壓低通濾波器。利用電流模式積分器組成一個Biquad電路,使截止頻率提升為680百萬赫茲,一般的Biquad電路主要由兩個區塊所組成,分別為lossy 及lossless差動積分器,可藉由改變偏壓電流來改變濾波器的截止頻率。此電路在2.5伏特的電源下工作,其消耗功率約為3.76毫瓦。使用0.25微米互補金氧半製成。zh_TW
dc.description.abstractLow voltage CMOS low pass filter using current-mode techniques is presented. The 680NHz cutoff frequency is achieved by using current-mode integrator as a building block of the current-mode biquad. A universal biquad is constructed from two basic building blocks, lossless and lossy differential current-mode integrators. Tuning of the biquad is obtained by changing the bias currents. The power consumption is 3.76mW with 2.5V supply voltage. The chip is fabricated in 0.25μm CMOS process.en_US
dc.language.isoen_USen_US
dc.subjectfilterzh_TW
dc.subjectintegratorzh_TW
dc.title用於PRML讀取通道之七階低通濾波器zh_TW
dc.titleA seventh-order low pass filter for PRML read channelen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
Appears in Collections:Thesis