完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 陳錫川 | en_US |
dc.contributor.author | Hsi-Chuan Chen | en_US |
dc.contributor.author | 李慶恩 | en_US |
dc.contributor.author | Ching-En Lee | en_US |
dc.date.accessioned | 2014-12-12T02:29:45Z | - |
dc.date.available | 2014-12-12T02:29:45Z | - |
dc.date.issued | 2002 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT910031003 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/69759 | - |
dc.description.abstract | 控片(Control Wafers)與擋片(Dummy Wafers)是晶圓製造過程中被用來增加產品品質與製程穩定的晶圓片,任何控擋片的缺貨將導致機台的停機,影響正常產品的生產。由於控擋片在晶圓廠中往往有相當大量的在製品存貨,基於降低成本的考量,晶圓製造廠採取回收與降級使用的方式來重複使用控擋片,希望達成正常產品的最大產出、減少機台停機比例、增加控擋片報廢前的使用次數、並降低控擋片在製品量的目標。 本文提出推式與拉式兩種控擋片管理系統,並就其派工、存貨管理、投料、降級法則進行討論。推式系統利用評估指標以分別決定投料與降級的路徑選擇;而拉式系統則以運輸問題解法同時決定投料與降級的數量與位置。本文比較這兩種方法的優劣,並以模擬方式驗證。結果顯示當管理者希望減少控擋片所使用之機台的停機時間時,採取拉式系統是較佳的方式。當希望增加控擋片在報廢前之利用次數時,則應採用推式系統。 | zh_TW |
dc.description.abstract | A variety of control or dummy wafers (C/D wafers) are utilized in wafer fabrication to enhance product quality and process stability. Any shortages of C/D wafers will stop the machine operations and affect the product wafer production. Since a large amount of C/D-wafer work-in-process (WIP) costs a fortune, wafer fabs downgrade and recycle worn C/D wafers into other functional areas for cost-down considerations. To reduce machine delay ratio, to increase recycled usages of C/D wafers, and to attain lower C/D-wafer WIP levels without lowering the throughput rate of product wafers are challenging and conflicting goals in fab management. This study presents two C/D-wafer management systems, the push and the pull systems, and discusses them according to four aspects, viz., dispatching rule, inventory control, release rule, and downgrading rule. The push system employs an evaluating index to determine the release and downgrading targets individually. The pull system solves the release and downgrading problem simultaneously using a transportation model. A simulation model of a pseudo wafer fab is constructed to analyze the performance of the two proposed systems. Simulation results demonstrate that the pull system is preferred if the machine delay ratio is of primary concern, whereas the push system leads to better utilization of C/D wafers. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 控片 | zh_TW |
dc.subject | 擋片 | zh_TW |
dc.subject | 機台停機比例 | zh_TW |
dc.subject | 使用次數 | zh_TW |
dc.subject | 推式系統 | zh_TW |
dc.subject | 拉式系統 | zh_TW |
dc.subject | 投料法則 | zh_TW |
dc.subject | 降級法則 | zh_TW |
dc.subject | control wafers | en_US |
dc.subject | dummy wafers | en_US |
dc.subject | machine delay ratio | en_US |
dc.subject | recycled usages | en_US |
dc.subject | push system | en_US |
dc.subject | pull system | en_US |
dc.subject | release rule | en_US |
dc.subject | downgrading rule | en_US |
dc.title | 控擋片管理 | zh_TW |
dc.title | Control and Dummy Wafers Management | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 工業工程與管理學系 | zh_TW |
顯示於類別: | 畢業論文 |