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dc.contributor.author陳佩嵐en_US
dc.contributor.authorPEL-LAN CHENen_US
dc.contributor.author堂麗英en_US
dc.date.accessioned2014-12-12T02:29:45Z-
dc.date.available2014-12-12T02:29:45Z-
dc.date.issued2002en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT910031012en_US
dc.identifier.urihttp://hdl.handle.net/11536/69769-
dc.description.abstract  傳統之缺陷數管制圖(c-chart)是積體電路公司最常用來監控晶圓(wafer)表面因微塵、刮傷等所造成之缺陷點數的製程管制工具,但近年來由於晶圓面積不斷增大,其製程越來越複雜,使得晶圓表面之缺陷點出現群聚(clustering)的現象,因而導致以卜瓦松(Poisson)分配為基礎之傳統缺陷數管制圖出現過多之假警報。針對此缺陷點群聚問題,許多中外文獻雖然提出了各種修正缺陷數管制圖,然而這些方法各有不周延之處。此外,由於缺陷數過多或缺陷群聚過於嚴重均會影響晶圓品質,但是中外文獻並未針對缺陷數群聚嚴重程度特別討論。因此,本研究針對晶圓上之缺陷數與缺陷群聚現象分別提出數個管制圖。本研究首先利用階層式群聚分析(hierarchical clustering analysis)法,排除了缺陷點群聚現象與缺陷數所產生的交互作用,建立一套有效的缺陷數管制圖以取代傳統之缺陷數管制圖。然後再利用缺陷群聚指標(clustering index)另發展一個管制缺陷群聚之管制圖。利用本研究之流程圖,可以使工程人員很快的偵測出製程失控的原因是缺陷數過多或是缺陷群聚過於嚴重。本研究最後分別以新竹科學園區某積體電路公司之實例及八吋晶圓模擬案例,證明了本研究流程較傳統之缺陷數管制圖及其他修正缺陷數管制圖簡易且效率更佳。zh_TW
dc.description.abstract  Integrated circuits manufacturing companies usually use the c-chart to control the wafer defects. The clustering of defects on a wafer becomes evident when the wafer size increases. The clustering phenomenon causes the Possion based c-chart invalid. Many modified c-charts have been developed to reduce the false alarms caused by defect clustering. However, there are still some drawbacks in employing the modified c-charts. This study proposed a statistical process control procedure for monitoring wafer defects and defect clustering simultaneously. The method employs hierarchical clustering analysis to remove the interaction of defect clustering and defect counts and obtain the modified defect counts to construct the c-chart. In addition to the c-chart for the modified defect counts, this study uses a cluster index, which does not require any assumption on the distribution of defects, to establish a procedure for monitoring defect clustering. Finally, a real-world case and a simulated case are presented to verify the effectiveness of the proposed procedure.en_US
dc.language.isozh_TWen_US
dc.subject管制圖zh_TW
dc.subject缺陷zh_TW
dc.subject缺陷群聚zh_TW
dc.subject群聚指標zh_TW
dc.subject積體電路zh_TW
dc.subjectcontrol chartsen_US
dc.subjectdefecten_US
dc.subjectdefect clusteringen_US
dc.subjectcluster indexen_US
dc.subjectIntegrate circuitsen_US
dc.title晶圓缺陷數與缺陷群聚之管制流程zh_TW
dc.titleProcedure of Monitoring Wafer Defects and Defect Clustering on in Integrated Circuits Manufacturing Processen_US
dc.typeThesisen_US
dc.contributor.department工業工程與管理學系zh_TW
Appears in Collections:Thesis