A 5GHz CMOS Power Amplifier for IEEE 802.11a Wireless LAN

Abstract

本篇論文提出,設計,及模擬一個適用於IEEE 802.11a無線區域網路之CMOS功率放大器.設計目標是希望能將功率放大器整合於一個純CMOS的無線收發器.此設計是採用三級的A級差動放大器的架構來達到系統的要求.根據模擬結果,當操作於3.3V電源供應下,在5.25GHz的中心頻率時,此功率放大器能達到41dB的功率增益,28dBm的 P1dB,及30dBm的OIP3. 此功率放大器將要用聯華電子0.25um CMOS製程來製作.

A CMOS power amplifier specified by IEEE 802.11a Wireless LAN is proposed, designed, and simulated. The PA is intended to be integrated into a full CMOS transceiver. A 3-stage class A structure with differential topology is employed to meet the requirement. According to simulation results, power gain of 41 dB, 1 dB compression output power (OP1dB) of 28dBm, and third order output interception point (OIP3) of 34dBm can be achieved by the PA with 3.3V supply voltage at the center frequency of 5.25 GHz. This work is going to be implemented using UMC 0.25um 1P5M CMOS technology.