具有鉑金屬矽化物之P通道蕭特基複晶矽薄膜電晶體的製造與分析

Abstract

在本篇論文中，我們製作具有鉑金屬矽化物及副閘極電場感應汲極之P型蕭特基複晶矽薄膜電晶體，並研究其特性。此一元件的特色包括：未摻雜之多晶矽作為電晶體的通道，在靠近汲極端有一段補償區，利用沈積於氧化層上的副閘極可感應出不同偏壓模式，使同一元件可操作於P或N通道模式，以及具有鉑金屬矽化物的源極/汲極。其中多晶矽通道是由固相再結晶的方法形成。值得一提的是，由於鉑金屬矽化物之源極與汲極的形成，使得元件之P通道的特性比N通道的特性，無論在開關電流比上或是次臨界擺幅都比較好，這使得鉑金屬矽化物之元件的應用在P通道更為重要，所以本篇論文就針對P型元件之特性加以描述。 其次，沿用具副閘極之蕭特基鉑金屬矽化物源極/汲極結構之Fin薄膜電晶體，完成90nm通道長度及50nm Fin寬度的操作。其中元件特性相較於傳統薄膜電晶體來說，次臨界擺幅下降接近至80mV/dec，開關電流比高達108，而且關閉電流亦小於量測系統本身具有的雜訊電流，這是因為Fin結構具有較好的通道控制能力，所以相較於傳統平面結構的元件有較少的漏電流通道。

In this thesis, we have fabricated and characterized Shocktty barrier Poly-Si thin-film transistors (SBTFTs) with PtSi Source/Drain and field-induced drain (FID). The FID-SBTFT features an un-doped poly-Si channel layer with an offset channel region, a top field-plate (the sub-gate) lying over the passivation oxide and overlapping the entire offset channel region, and Pt-Silicided source/drain. In this work, the poly-Si channel layers were prepared by solid-phase crystallization (SPC) technique. It is worth mentioning that the performance in P-channel operation is much better than N-channel operation, with higher on/off current ratio and sharper subthreshold swing (SS). As a result, the device with PtSi is extremely promising for P-channel operation. In this thesis, we describe the importance of the SBTFTs with PtSi S/D on P-channel operation. In addition, Poly-Si TFTs featuring PtSi Source/Drain, and nano-scale channel Fin structure with 90nm channel length and 50nm width were fabricated and characterized. The use of nano-scale poly-Si channels allows stronger control of the channel potential by the gate bias, and therefore better subthreshold characteristics could be obtained. We compared the p-type performance of devices with two kinds of structures, and also studied the effects of sub-gate bias, main-channel length, and channel offset length. Excellent device performance in terms of steep subthreshold slope (80mV/dec) and on/off current ration higher than 108 is obtained for P-channel operation.