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dc.contributor.author謝德慶en_US
dc.contributor.authorDe-Ching Shieen_US
dc.contributor.author雷添福en_US
dc.contributor.authorTan-Fu Leien_US
dc.date.accessioned2014-12-12T02:30:44Z-
dc.date.available2014-12-12T02:30:44Z-
dc.date.issued2002en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT910428079en_US
dc.identifier.urihttp://hdl.handle.net/11536/70409-
dc.description.abstract一般而言,在極大尺寸整合製造方面二氧化矽已被當成閘介電層。隨著元件尺寸不斷地被微縮化,閘氧化層的厚度也得更薄。不過由於直接穿透漏電流及不均性,二氧化矽層並不適用在1.5nm以下。按照目前二氧化矽的發展來看,預料不斷微縮化的CMOS製程最大的挑戰是用高介電常數材料去取代二氧化矽。在多種高介電係數材料中,二氧化鉿因有相當高的介電常數(約30)、較寬的能隙禁帶(約5.68 eV),且與矽有良好的熱穩定性所以很適合於未來閘介電層的應用。 在論文中,我們研究關於鉿金屬氧化物經由NH3 電漿的沈積後處理及不同回火溫度在物性,電性以及可靠度分析的特性。利用電子槍蒸鍍系統在矽基板上鍍鉿金屬氧化物,並在蒸鍍後利用NH3 電漿處理(高密度化學氣相沈積系統),配合不同的後續退火溫度(N2快速熱退火系統),藉以分析此介電層之電性及物性之變化。結果顯示經由NH3電漿及N2氣體快速退火處理後,使得二氧化鉿在漏電流,崩潰電場,及可靠度方面有良好的改善。 再者,良好的磁滯飄移約35 mV 與載子依附溫度效應的抑制被證明出是由於NH3電漿及後續快速退火處理的加強。另一個有趣的發現是p型矽基板的電容在C-V磁滯上的轉折現象,導因於高電場量測時撞擊產生的電子電洞對的電洞陷在二氧化鉿介電層中。再者,二氧化鉿的崩潰特性問題也被深入地研究。軟崩潰及硬崩潰的發生機率被證實導因於鉿矽酸鹽層的存在。綜上所述,二氧化鉿介電層的特性在NH3電漿配合後續快速退火處理後得到了有效的改善。這種新穎的NH3電漿處理提供了未來奈米元件應用在金氧半沈積處理上一個極佳的選擇。zh_TW
dc.description.abstractConventionally, silicon dioxide has been used as the gate dielectrics in ultra-large scale integrated (ULSI) fabrication. As the device features’ size is scaled down to quarter and beyond, the thickness of gate oxide also has to be made progressively thinner. However, it may not be feasible to use SiO2 films with thickness smaller than 1.5nm due to the tunneling leakage and non-uniformity. In light of recent developments of silicon oxide, it has been predicted that the greatest challenge to continued scaling of the MOS transistor may be the replacement of SiO2 with a high dielectric constant (high-k) material. Among the high-k dielectrics, hafnium dioxide (HfO2) with sufficiently high dielectric constant (~30), wide energy bandgap (~5.68eV), and good thermal stability with silicon is suitable for the future gate dielectrics application. In this thesis, physical, electrical and reliability characteristics of ultra thin Hf-based oxide with post-deposition NH3 plasma treatment and rapid thermal annealing were studied for the first time. We present the dual E-gun sputtered Hf-based dielectrics with different post NH3 treatment conditions and various post annealing temperatures (RTN2). Basic characteristics of HfO2 such as leakage current, breakdown field, and time dependent dielectric breakdown (TDDB) were improved after the post-deposition NH3 plasma treatment and subsequent RTN2. Besides, our results show that plasma and RTA treatment appear to be more effective in reducing the temperature dependence of charge trapping and improving hysteresis, as compared to the control sample. Another interesting finding is the turn around phenomenon of C-V hysteresis for p-type substrate capacitors owing to the hole trappings, which resulted from the impact ionization, at the high electric field measurement in the hafnium dioxide dielectrics. In addition, the reliability of HfO2 gate dielectrics was also studied. Detail analysis suggests that the generation probability of soft breakdown and hard breakdown are related to the existence of hafnium silicate layers. To sum up, the characteristics of HfO2 gate dielectrics with post NH3 plasma and subsequent RTA treatment described above are effectively improved. This novel NH3 plasma treatment provides an alternative for post metal-oxide deposition treatment in nanoscale device application.en_US
dc.language.isozh_TWen_US
dc.subject二氧化鉿zh_TW
dc.subjectzh_TW
dc.subject電漿zh_TW
dc.subjectHfO2en_US
dc.subjectNH3en_US
dc.subjectplasmaen_US
dc.title氨氣後處理及不同退火溫度改善鉿金屬氧化層之研究zh_TW
dc.titleHafnium-based Gate Dielectrics with NH3 Post-treatment and Various Annealing Temperaturesen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
Appears in Collections:Thesis