標題: 含氧摻雜SiC介電阻障層製程整合之研究
Study on integration of Oxygen-doped SiC Dielectric Barrier Layer
作者: 楊富明
Fu-Ming Yang
羅正忠
張鼎張
Jen-Chung Lou
Ting-Chang Chang
電子研究所
關鍵字: 低介電常數;low-k
公開日期: 2002
摘要: 為了建構高效能的積體電路,增加金屬內連線的層數與縮小導線間的距離成為必然的趨勢。此將導致電子訊號在積體電路中的傳送速度大幅降低,衍生所謂電阻-電容時間延遲(RC delay time)。為了降低訊號傳遞的時間延遲,現今已經發展以金屬銅(電阻率為1.7μΩ-cm)來取代金屬鋁(電阻率為2.7μΩ-cm)成為導線的連線系統。而在降低電容方面,則朝向低介電常數 ( low-k ) 材料發展。但是在銅與鑲嵌的製程與電性操作的環境下,溫度與電場的作用,銅極易擴散至低介電常數材料中,並與之發生反應,造成材料特性的劣化與漏電流增大,甚至導致介電質崩潰。因此,在符合製程相容性要求的前提之下,發展具抗銅金屬擴散特性的介電阻障層材料,便成為重要的研究課題。 目前一種含氧碳化矽(silicon carbide)材料薄膜,具有低的介電係數(k~3.7),因此受到廣大的矚目,而被應用於介電阻障層技術中,用來取代傳統具高介電係數的氮化矽(silicon nitride) (k~7),以降低導線系統的延遲時間。本論文將討論含氧碳化矽膜的基本物性及電性,並探討其漏電流的機制,以及其在後段製程中受溫度的影響,接著模擬後段製程的溫度處理後薄膜對其抗銅能力的探討。最後,將樣品放置在低溫的環境下,探討其漏電機制。
As the device dimensions continue to shrink, interconnection delay becomes a limiting factor for increasing devices speed. Since interconnection delay is the product of the resistance in metal interconnection and the capacitance between the metal lines, we have minimize the parasitic capacitance and the resistance in interconnection. Copper is an applicable alternative due to its low resistivity (1.7μΩ-cm), which is much lower than that of Al (2.7μΩ-cm). Besides, copper is more resistant to electromigration problem, which is a vital issue in device reliability. The diffusion barrier layer is also served as the etch stop layer during trench formation if necessary. Silicon nitride (SiN) is the currently standard barrier layer material since it has been employed as a masking and passivating layer for a long time against diffusion of metal ions and moisture. Unfortunately, the relative high dielectric constant (k~7) of SiN conflicts with the requirement of low dielectric IMD. Therefore, it is urgently desirable to seek a new barrier layer material. Recently, a newly-developed dielectric barrier material, amorphous SiOC:H(k~3.7) has aroused much attention In this thesis, we study the fundamental concepts and the intrinsic properties and the effect of temperature in BEOL process. Then we simulate the condition of BEOL process to find the barrier properties of the SiOC:H film against copper penetration. Finally, we let the sample at low temperature and measure its electrical characteristics.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT910428090
http://hdl.handle.net/11536/70419
顯示於類別:畢業論文