應用於無線傳輸具有抗錯誤能力之影像編解碼器設計

Abstract

隨著支援無線多媒體應用之須求增加，從事於具有抗錯誤能力之影像編碼 的開發益顯重要。改善靜態/動態影像傳輸品質於雜訊頻繁之通道的研究 已大量投入。在此論文中，我們探討及從事於開發具有抗錯誤能力，以位 元層為基礎之影像編碼方法，應用於離散餘弦函數轉換影像壓縮技術之 上。它具有高容錯能力，少額外資訊及低複雜度之優點。因為具有位元層 次編碼的特性，它能提供階層化影像壓縮功能。藉由使用位元層漸近式傳 輸，不對稱錯誤保護機制可以很容易嶄入於各位元層中。緊接著，我們提 出固定位元層可偵測錯誤之影像編碼技術，可以應用於高影像品質擷取之 應用。它具有高準確率偵測錯誤影像區塊之能力，僅須透過簡單之動作。 除此之外，一個簡易且有效率的錯誤消除方法也被提出來改善回復影像之 品質。它嘗試保留低頻帶資訊並移除可疑錯誤之資訊，因為具有低複雜度 及短延遲時間的特性，它非常適合於即時影像的應用。 在論文的最後，我們設計及制造一個低功率，以位元層為基礎之影像編解 碼器系統，給於可擕帶式多媒體之應用，在此領域低耗功率是主要設計要 件。我們利用有效率的平行化及管線化硬體架構去使功率消耗最佳化。此 外，階層式記憶體架構被應用於減低記憶體之消耗功率，同時我們使用資 料推動運算之有效預測方式來避免不必要之電路切換功率。此編解碼器系 統展現出低成本及低功率消耗之優點，這些成果可以滿足各種可擕帶式多 媒體系統之須求。

With the increasing demand for supporting wireless multimedia services, there has been significant interest in the deployment of error resilient image coding. Many researches have been invested to improving the quality of image/video transmission through noisy channels. In this dissertation, we are involved in developing error resilient bit plane image coding (BP-ERIC) for DCT-based image compression. It exhibits high error tolerance, low redundancies, and low complexity. Because of bit plane coding nature, BP-ERIC provides scalable image compression feature. For bit-plane progressive transmission, bit-plane-wise unequal error protection can be easily integrated. Furthermore, a fixed bit-plane error detectable image coding (FBP-EDIC) is proposed for high image quality retrieving applications. It provides high accurate erroneous image blocks detection capability by simple operations. Besides, a simple and efficient image post-processing error concealment scheme is exploited. It tries to retain low frequency data and remove suspicious erroneous information. Because of low complexity and short latency properties, it is very suitable for real time applications. Finally, a low-power bit-plane image codec system is designed and implemented for portable multimedia applications where low power consumption is the main design constraint. It exploits efficient parallelism and pipelining architectures to optimize power dissipation. Hierarchical memory organization is also employed to minimize memory power. A predictive data-driven operation scheme is applied to minimize unnecessary switching power. The codec system exhibits both low cost and low power consumption features. These performances can meet various portable multimedia system requirements.