標題: 嵌入式雙核心微處理器之耗電分析與評估器
Energy Estimator/Analyzer for Embedded Dual Core Processor
作者: 許君豪
Chun-Hao Hsu
李育民
曹孝櫟
Yu-Min Lee
Shiao-Li Tsao
電信工程研究所
關鍵字: 雙核心;軟體耗電;嵌入式軟體;低功耗;Dual core;Software energy;Embedded software;Low power
公開日期: 2006
摘要: 近年來,嵌入式系統常採用異質雙核心或多核心微處理器來增進效能並減少成本及耗電,例如行動電話、個人數位助理等。如何在異質雙核心平台上設計出符合效能且節省耗電的軟體是非常重要的議題。目前已經有相當多軟體耗電模擬、分析之技術和工具來幫助評估之軟體耗電。然而,這些技術與工具軟體大多針對單核心微處理器。目前尚無適合評估異質雙核心微處理器耗電的方法和工具被提出。本論文提出評估與分析異質雙核心軟體耗電之方法並且實做成工具軟體。此工具軟體不僅評估雙核心應用程式之總耗電,並且分析其耗電與時間之分佈。此工具軟體可幫助程式設計者更有效率、更簡便地觀察並診斷雙核心應用程式之耗電問題。我們混合多種高層次方法建立耗電模型,並藉由硬體計數器追蹤軟體動態執行時之耗電與時間分佈。實驗結果顯示評估之耗電與實際量測最大誤差在百分之五以內。
Recently, embedded systems such as mobile phones adopt heterogeneous dual-core or multi-core processors to improve the performance and reduce the cost and power. One of the critical issues for such an embedded system using heterogeneous dual-core processor is the software and system designs while maximize the computation power of a heterogeneous dual-core and minimize the power consumption of a system. Hence, the software design for heterogeneous dual-core is very important for a low power embedded system using dual-core processors. In order to evaluate the power consumption of the embedded software, a number of power modeling and analysis techniques and tools were proposed. Unfortunately, these models and tools are designed for single core processor, and there is no suitable mythology for modeling and analyzing power consumption for a heterogeneous embedded dual-core processor. In this thesis, an instrument-based tool for energy consumption estimation and analysis of the embedded software running on a dual-core processor is proposed and developed. This tool not only estimates the total consumed energy/time but also analyzes the energy/time distribution of dual-core applications. With the aid of this tool, dual-core application designers could observe and diagnose the power consumption of the applications efficiently and easily. It also provides an opportunity for further software energy optimization. In this work, we apply hybrid high-level modeling techniques and profile the energy and time through hardware timers. Experimental results demonstrate that the max error is less than 5%.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009213609
http://hdl.handle.net/11536/70512
顯示於類別:畢業論文


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