低電源的2.4GHz低中頻CMOSI/Q路徑（四相位）接收機

Abstract

討論了以源極電感和閘極電感做為輸入阻抗匹配, 以串疊式電晶體為架構的低雜訊放大器；以電阻作為負載, 降低1/f雜訊適用於低電壓的吉爾柏混波器；2.4GHz積體化金氧半正交訊號輸出壓控器盪器，壓控振盪器架構為PMOS和NMOS雙交偶合對(cross-coupled pair)的型式以提高負電導。並且以CMOS 0.25μm 的製程, 實作一個2.4GHz低中頻無線電接收器(radio receiver), 包含2.4GHz低雜訊放大器、2.4GHz吉爾柏混波器及2.4GHz正交訊號輸出壓控器盪器。預計使用電路板的量測，以預估積體電路到電路板的打線等所產生的高頻寄生效應，預計在1.5V的電壓消耗33mW的功率下，達到S11<-10dB，電壓增益19dB，IIP3 為–19dBm，NF為16dB。

A low noise amplifier using a gate inductor and a source degeneration inductor for input matching and with the cascode topology, a Gilbert cell mixer with low voltage using resistor load impedance to decrease 1/f noise and a 2.4GHz quadrature Voltage-Controlled Oscillator using both NMOS and PMOS cross-coupled pair to enhance negative conductance are discussed. And the radio receiver including a 2.4GHzlow noise amplifier, a 2.4GHz Gilbert cell mixer and a 2.4GHz quadrature Voltage-Controlled Oscillator is implemented 0.25μm process. Expected to use on-board measurement, the high frequency parasitic effects outside the on-chip circuit, such as bond-wire effects from the on-chip circuit to PCB and micro-strip lines on the PCB, etc, are estimated in simulation. And expected specifications are as follows: Voltage supply 1.5V, power consumption 33mW, S11<-10dB, Voltage gain 19dB，IIP3 –19dBm，NF 16dB。