射頻CMOS功率放大器設計用於藍芽與無線區域網路系統

Abstract

本篇論文的第一部份敘述一個適用於藍芽系統Class 1之CMOS功率放大器，利用串疊組態的功率電晶體提供高訊號擺動以增加輸出功率。輸出級的輸入端加入一個接法如二極體的電晶體線性化偏壓電路，此線性化偏壓電路提供一個與輸出級的輸入電容成反向的曲線特性用以補償輸入電容的不線性特性。模擬結果顯示此放大器的P1dB點改善了1.5 dB至2 dB且P1dB = 22 dBm、PAE = 28 %。此功率放大器使用TSMC 1P5M 0.25-um CMOS製程製作兩級增益級及線性化電路，使用印刷式電路板設計輸入及輸出的匹配網路。 本篇論文的第二部分則敘述一個適用於無線區域網路802.11a及802.11g之雙頻CMOS功率放大器，為了線性度的考量採取Class A的偏壓點。利用兩個似Diplexer形式的電路加上集總原件以設計出所需輸入及輸出端的雙頻匹配網路。模擬結果所示P1dB在2.4-GHz和5.2-GHz皆大於21 dBm、增益和功率增加效率在2.4-GHz及5.2-GHz 分別為20 dB、7 dB和24 %和18 %。

The first part of this thesis describes a CMOS Power Amplifier for Bluetooth Class1 applications using cascode configuration power transistor to provide higher signal swing. A diode-connected linearized biasing network is applied to the input of output stage; it provides an inverse input capacitance (Cin’) curve in order to compensate the nonlinear Cin of the power transistor. The simulation results show the P1dB is enhanced for 1.5dB ~ 2dB and result in P1dB = 22 dBm, PAE = 28 %. However two transistors and linearizer circuit are fabricated by using TSMC 1P5M 0.25-um CMOS process. Moreover input-matching and output-matching network are built on PCB. The The second part of this thesis shows a dual-band CMOS power amplifier for WLAN 802.11a (5.2-GHz) and 802.11g (2.4-GHz) applications that adopt Class A biasing point for linearity consideration. Designing input and output dual-band matching networks by using two diplexer-like circuits. The simulation results show P1dB > 21 dBm at 2.4-GHz and 5.2-GHz, gain and PAE equal to 20 dB, 7 dB and 24 %, 18 % at 2.4-GHz and 5.2-GHz respectively.