標題: | Hardware Architecture for High-Performance Regular Expression Matching |
作者: | Lee, Tsern-Huei 電信工程研究所 Institute of Communications Engineering |
關鍵字: | Hardware acceleration;nondeterministic finite automaton;regular expression |
公開日期: | 1-七月-2009 |
摘要: | This paper presents a bitmap-based hardware architecture for the Glushkov nondeterministic finite automaton (G-NFA), which recognizes a given regular expression. We show that the inductions of the functions needed to construct the G-NFA can be generalized to include other special symbols commonly used in extended regular expressions such as the POSIX 1003.2 format. Our proposed implementation can detect the ending positions of all substrings of an input string T, which start at arbitrary positions of T and belong to the language defined by the given regular expression. To achieve high performance, the implementation is generalized to the NFA, which processes K symbols in each operation cycle. We provide an efficient solution for the boundary condition when the length of the input string is not an integral multiple of K. Compared with previous designs, our proposed architecture is more flexible and programmable because the pattern matching engine uses memory rather than logic. |
URI: | http://dx.doi.org/10.1109/TC.2008.145 http://hdl.handle.net/11536/7073 |
ISSN: | 0018-9340 |
DOI: | 10.1109/TC.2008.145 |
期刊: | IEEE TRANSACTIONS ON COMPUTERS |
Volume: | 58 |
Issue: | 7 |
起始頁: | 984 |
結束頁: | 993 |
顯示於類別: | 期刊論文 |