Full metadata record
DC Field | Value | Language |
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dc.contributor.author | 蔡元浩 | en_US |
dc.contributor.author | Tsai Yuan-hau | en_US |
dc.contributor.author | 龍文安 | en_US |
dc.contributor.author | Loong Wen-an | en_US |
dc.date.accessioned | 2014-12-12T02:31:26Z | - |
dc.date.available | 2014-12-12T02:31:26Z | - |
dc.date.issued | 2002 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT910500038 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/70916 | - |
dc.description.abstract | 本論文為低介材 SiOC:H 薄膜的製備方式與其製程整合性質之探討。薄膜製備採高密度電漿(感應耦合電漿)化學氣相沉積,沉積主要參數為3MS/N2O 比例、基材溫度、ICP 功率、偏壓4參數。 沉積最佳參數為壓力250 mTorr,3MS/N2O氣體流量比0.15,沉積溫度90℃,ICP功率250 W。薄膜介電常數值為2.45。前述參數成長之薄膜經400℃回火一小時後,介電常數可由2.45降至2.07;以鋁為電極,於電場強度1 MV/cm時,漏電流密度約4.28×10-9 A/cm2,呈現良好電特性。薄膜於500℃回火後,因 Si-CH3 鍵逐漸分解脫附,產生微孔,600℃回火後產生之微孔又大又多,顯示薄膜熱穩定性於400℃回火仍具有良好性質,極限應為500℃左右。經回火後,Si-O-Si 類籠狀結構經過分子重排,逐漸轉換成 Si-O-Si 網狀結構。 未加偏壓之薄膜,以銅為電極,於電場強度1 MV/cm時,漏電流密度介於 9.45×10-9 A/cm2至3.94×10-8 A/cm2之間,加偏壓之試片漏電流密度均變大,最差的達到 4.35×10-6 A/cm2,顯示未加偏壓之試片在漏電流密度上具有較佳的電特性,並具良好銅原子阻障性質。 SiOC:H 如經最適化參數製備,提升機械強度與降低熱膨脹係數,有潛力應用為 90 nm節點,介電常數 <2.2之超低介材。 | zh_TW |
dc.description.abstract | In this thesis, the preparation of low-k SiOC:H film and its properties of process integration were studied. All thin film depositions were carried out in High Density Plasma (ICP) CVD system. The major deposition parameters were 3MS (Trimethylsilane) / N2O (Nitrous Oxide) ratio, substrate temperature, ICP power, and bias. The optimal parameters of deposition are chamber pressure 250 mTorr, 3MS/N2O ratio 0.15, substrate temperature 90℃, ICP power 250W. The dielectric constant of thin film was measured as 2.45. The annealing of thin film prepared from above parameters at 400℃ for 1 hr, dielectric constant was reduced from 2.45 to 2.07. Under electric strength 1 MV/cm, Al-gate leakage current density was 4.28×10-9 A/cm2, good electrical characteristic property was shown. Annealing at 500℃, the Si-CH3 bond breaking and desorption gradually happened, then, small pores produced. When annealing at 600℃, the pores grew more and larger, indicating the film’s thermal stability can be kept after 400℃ annealing, and limitation was estimated at about 500℃. After annealing, the Si-O-Si caged-like structure was transformed to network structure through molecular rearrangement. Without bias, Cu-gate leakage current density was between 9.45×10-9 A/cm2 to 3.94×10-8 A/cm2 under 1 MV/cm . When bias was applied, the leakage current of samples became greater and the worst value was 4.35×10-6 A/cm2. The samples without bias will have better electrical and barrier properties. If SiOC:H film was prepared by optimized parameters, and mechanical strength raised, thermal expansion coefficient decreased, will have the potential to be used in 90 nm node as ultra low-k material with dielectric constant <2.2. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 低介材 | zh_TW |
dc.subject | SiOC:H | en_US |
dc.title | 高密度電漿化學氣相沉積製備低介材SiOC:H 之薄膜特性研究 | zh_TW |
dc.title | The Study on Thin Film Properties of Low-k Material SiOC:H Deposited by HDPCVD | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 應用化學系碩博士班 | zh_TW |
Appears in Collections: | Thesis |