以Gm-C為架構的程式可規劃類比陣列之系統電路設計

Abstract

本論文旨在設計程式可規劃類比陣列（FPAA），它和程式可規劃閘陣列（FPGA）一樣具有可重複規劃之功能，與FPGA最大區別，在於FPAA是以類比電路為基本單元，再由多個基本單元之間的相互連接來完成一個可程式化的電路系統，我們稱此基本單元為可描述式的類比方塊（CAB）。一個CAB可以完成多種簡單的數學函式，因此我們可以使用多個CAB來完成具更大功能之電路系統。在工業應用上，由於控制器與濾波器經常需要隨負載作適當的參數調整。為達成此一要求，使用者便可以利用FPAA的可重複規劃功能來完成此類型的電路系統。文中提出並分析設計一種新型高頻域之程式可規劃轉導放大器，我們以程式可規劃Gm-C積分器、程式可規劃電容器以及MOSFET類比開關來合成一可描述式的類比方塊，其電路系統中亦包含有自動校正電路。整體FPAA系統是以 TSMC 0.35um Mixed Mode( 2P2M,5V)製程來進行設計與模擬，其系統之內部最高工作頻率範圍可達10MHz（積分器相位誤差<3度），最後設計完成一個2×1可描述式的類比方塊陣列之系統電路。

This thesis is to design a circuit, called a Field-Programmable-Analog-Array (FPAA). The kernel analog cells in FPAA and called the configurable analog arrays (CAB). Like the FPGA, FPAA can be re-configured by the users by programming the CABs and interconnection wires. The primary difference between them is that FPAA is constructed by analog cells. Each CAB can implement simple mathematic functions. The combination of CABs can implement a more complicate circuit system. In industrial applications, the parameters of controller and filter are always needed to adjust with the change of the load. This need can be implemented by reprogramming FPAA. A novel programmable high-frequency transconductor is proposed and analyzed. A general configurable analog block（CAB）is presented, which consists of the proposed programmable Gm-C integrator, programmable capacitor and MOSFET switchs. A tuning circuit is also discussed. The FPAA is designed and simulated by TSMC 0.35μm 2P4M process. Without output stage , the simulation results show the FPAA with an maximum operating frequency range larger than 10MHz（ integrator phase error <3 degree ）. A universal 2 × 1 CAB array has been designed.