標題: | 設計內嵌ARM處理器的單晶片CMAC控制器 Design the ARM-Based CMAC SoC Controller |
作者: | 林克學 Lin Ko-Hsueh 陳福川 Fu-Chuang Chen 電控工程研究所 |
關鍵字: | 類神經網路控制系統;單晶片;ARM;SoC;CMAC |
公開日期: | 2002 |
摘要: | 本論文的目的主要可以分為系統分析以及硬體設計兩方面。在系統分析方面,本論文研究CMAC類神經網路控制系統的控制行為並分析系統的特性。這裡使用Runge-Kutta法來模擬受控系統的輸出/輸入特性。CMAC控制系統不需要關於機械臂的任何資訊,而且可以應付很大的負載變化。當輸入向量緩慢的移動的時候,CMAC控制器會產生龐大的積分動作,但是當輸入向量快速變化的時候,CMAC控制器也能有效的產生“遺忘”效應。論文中也探討了CMAC控制系統的種種性質與對應的模擬結果。在硬體設計方面,本論文規劃了CMAC類神經網路控制晶片的架構以及用硬體描述語言Verilog做更進一步的實現。在架構設計上,本論文設計以內嵌ARM處理器的結構來實現CMAC類神經網路中的演算法。最後,本論文提供此CMAC類神經網路控制晶片平行處理的解決方案,藉以增加晶片內部單元平行處理的套數並做適當的排程來大幅提升不同應用所可能需求的更高處理速度。 There are two main objective of this paper, system analysis and hardware design. In the aspect of system analysis, the behavior of the CMAC control system has been studied and stability of the system has been analyzed in this thesis. The Runge-Kutta method is adapted to find out the characteristic between output and input of plant. However, the CMAC requires no information about the robot, and can deal with large variations in load. The CMAC produces enormous integration action when the input vector moves slowly in the space, but it can also forget efficiently when the input vector moves fast in the space. It is shown that the CMAC control system can converge into the target position. In the aspect of hardware design, on the architecture design and further implementation in Hardware Description Language Verilog have been focused in this thesis. On architecture design, the ARM- based structure is adapted to implement the CMAC neural network. At last but not least, the solution of parallel processing in the CMAC neural network chip is provided, for higher processing speed in accordance to different application. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT910591092 http://hdl.handle.net/11536/71066 |
顯示於類別: | 畢業論文 |