在矽基板上成長低溫鍺以及微米圖形以做為高品質砷化鎵薄膜之磊晶模板

Abstract

摩爾定律預測，傳統的矽元件在小尺寸上(小於100奈米)時遇到瓶頸，三五族材料的特性，如高電子遷移率，開始被注意到，進而開始應用在元件，然而為了降低生產成本上，三五族材料如砷化鎵在矽基板上的磊晶製程開始被研究，為了製備出高品質的砷化鎵磊晶層，砷化鎵/鍺/矽的結構開始被研究，因為鍺和砷化鎵擁有幾乎相同的晶格常數和熱膨脹系數，故在本論文中將會研究低溫鍺磊晶層成長於矽基板上。 本實驗中低溫成長鍺磊晶層於矽基板上，再將砷化鎵薄膜成長於磊晶層之上，並分析該層砷化鎵的缺陷以及晶體特性;同時對低溫鍺的結構做最佳化處理，使得表面平坦度及缺陷密度降低。最後再將氧化矽形成之微小溝槽結構建立於低溫鍺之表面，以作為未來在矽基板上製作互補式金氧半場效電晶體結構之選項之一。

Moore’s law predicts when the device is scaling down below 100 nm, the performance of Si device reaches its limitation. In the same time, the outstanding features of III-V materials higher electron mobility will play a major role along with Si in future high speed devices. In order to reduce the manufacturing costs, a heterogeneous integration of III/V compound materials (ex: GaAs) with Si platform is necessary. In literature, the high quality GeAs epilayers can be grown on Si substrate by using Ge as the buffer layer. The reason of using Ge as the buffer layer is that the lattice constants and thermal expansion coefficients of Ge and GaAs are almost the same. In the thesis, the Ge epilayer on Si, the GaAs grown on Ge/Si template, and the micro pattern on Ge surface are studied. First, low-temperature Ge epilayer was grown on Si substrate. The thin GaAs film was then grown onto the Ge and the defects and crystallinity of GaAs layer were analyzed .Optimize the LT-Ge epitaxy process so as to reduce its’ defect density and surface roughness. Finally, the micro pattern consist of SiOx was implanted on the surface of the Ge/Si template for the frabication of Complementary Metal-Oxide-semiconductor (CMOS) structure in the future.