標題: | 基於希爾伯特-黃轉換之應用於生醫音頻訊號處理系統晶片設計 An Improved Hilbert-Huang Transform Processor Design for Bio-sound Signals Processing System-on-Chip |
作者: | 周佳慶 Chou, Chia-Ching 方偉騏 Fang, Wai-Chi 電子工程學系 電子研究所 |
關鍵字: | 經驗模態分解;群集經驗模態分解;希爾伯特-黃轉換;可攜式生醫系統;數位信號處理;系統晶片設計;Empirical Mode Decomposition;Ensemble Empirical Mode Decomposition;Hilbert-Huang Transform;Portable Bio-medical System;Digital Signal Processing;System-on-Chip Design |
公開日期: | 2012 |
摘要: | 全球高齡人口的數量(1990年至2025年)已被預測將從3.75億人成長至7.61億人,此劇烈成長的趨勢造成在不久的未來社會將面臨高齡化社會所帶來的健康照護問題。在現今醫務人員短缺的情況下,將使愈來愈多的醫院無法負擔此現象所帶來的健康照護成本。因此,利用創新的科技開發出高整合度的健康照護系統已成為研究人員在最近幾年的重要課題。
本論文將提出一基於希爾伯特-黃轉換之應用於生醫音頻訊號處理系統晶片設計,希爾伯特-黃轉換對於非線性以及非穩態的訊號具有高適應性以及調變性,尤其在訊號時頻域的分析具有更高的解析度,基於此演算法具有高複雜度及迴圈式的運算,若要達到即時的訊號分析以及高整合度的設計,利用超大型積體電路的技術來實現此系統是可行且必要的。
本論文所提出之生醫音頻訊號處理系統晶片設計包含一訊號前處理單元,一記憶體管理單元,一系統控制單元,一群集經驗模態分解引擎,以及一瞬時頻率分析引擎。數位的心音訊號被用來當做本系統雛型驗證的生醫音頻訊號,經由訊號前處理單元做雜訊抑制與振幅調變,並完成加雜訊與正規化的動作,接下來由群集經驗模態引擎對訊號做時域分解,並將相關的成分分解至同一個本質模態函數,再將每個本質模態函數傳遞至瞬時頻率分析引擎進行希爾伯特頻譜分析。
為了能有效地改善不穩定訊號所帶來的效應以及干擾,本論文在整體演算法架構上做了很多突破與創新,並順利地在有限的硬體資源下以系統晶片的方式實現此改善的希爾伯特-黃轉換處理器系統設計並使用台灣積體電路90奈米CMOS技術下線晶片。 The global population of people over the age of 65 is predicted to more than double, from 375 million in 1990 to 761 million by 2025. Healthcare problems relating to the aging population will become a serious social issue. Furthermore, because of the shortage of medical personnel, hospitals will be unable to afford the necessary medical interventions. Therefore, innovative health-care systems with high integrativity have become an important topic of research in recent years. This thesis presents a bio-sound signal processing System-on-Chip (SoC) with an on-board improved Hilbert-Huang transform (HHT) processor. This processor has proven to be an adaptive and efficient method for nonlinear and nonstationary signal analysis. However, the HHT method involves a large number of complicated and iterative computations. It is necessary to use VLSI technology to implement this proposed system with high integrativity and real-time applications. The proposed improved HHT SoC design consists of a data pre-processing unit to suppress noise and the aliasing effect. An intelligent memory management unit was developed to solve the problem of frequently reading and writing data from and to the memory, and a system control unit is used to effectively accelerate the performance of the overall system. The heart sound signals could be decomposed into a collection of Intrinsic Mode Function (IMFs) through an EEMD engine. The Hilbert spectrum analysis of each corresponding IMF can be efficiently derived through an improved IFNDQ engine based on the direct quadrature method. To overcome the noise and aliasing effect caused by nonstationary signals, many innovative and effective modules were developed in this thesis. The proposed HHT SoC design could be implemented in hardware with limited resources and fabricated under TSMC 90 nm CMOS technology. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT079911628 http://hdl.handle.net/11536/71870 |
顯示於類別: | 畢業論文 |