完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Ker, Ming-Dou | en_US |
dc.contributor.author | Liao, Hung-Tai | en_US |
dc.date.accessioned | 2014-12-08T15:09:27Z | - |
dc.date.available | 2014-12-08T15:09:27Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.isbn | 978-1-4244-0920-4 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/7223 | - |
dc.identifier.uri | http://dx.doi.org/10.1109/ISCAS.2007.378207 | en_US |
dc.description.abstract | In the nanometer-scale CMOS technology, the gate-oxide thickness has been scaled down to support a higher operating speed under a lower power supply (1xVDD). However, the board-level voltage levels could be still in a higher voltage levels (2xVDD, or even more) for compatible to some earlier interface specifications in a microelectronics system. The I/O interface circuits have been designed with consideration on the gate-oxide reliability in such mixed-voltage applications. In this work, a new mixed-voltage crystal oscillator circuit realized with low-vottage CMOS devices is proposed without suffering the gate-oxide reliability issue. The proposed mixed-voltage crystal oscillator circuit, which is one of the key I/O cells in a cell library, has been designed and verified in a 90-nm 1-V CMOS process to serve 1/1.8-V mixed-voltage interface applications. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Design of mixed-voltage crystal oscillator circuit in low-voltage CMOS technology | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/ISCAS.2007.378207 | en_US |
dc.identifier.journal | 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 | en_US |
dc.citation.spage | 1121 | en_US |
dc.citation.epage | 1124 | en_US |
dc.contributor.department | 電機學院 | zh_TW |
dc.contributor.department | College of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000251608401098 | - |
顯示於類別: | 會議論文 |