金氧半場效電晶體 (MOSFET) 閘極及源/汲極製程改善之研究

Abstract

摘要

當半導體元件尺寸縮小至90奈米以下時，對材料和製程控制的品質要求愈來愈嚴格。金氧半場效電晶體 (MOSFET) 是超大型積體電路例如微處理器及記憶體中最重的元件，而閘極及源/汲極是其最主要的組成。因此，閘極及源/汲極材料的品質將直接影響到元件的性能。在本論文中，我們針對閘極及源/汲極材料製程進行改善，以改善元件性能。

針對多晶矽 (Polysilicon) 閘極，我們提出堆疊式多晶矽薄膜沉積方法，此方法是在多晶矽薄膜上沉積非晶矽 (Amorphous silicon) 薄膜。實驗證實，此方法可有效降低多晶矽薄膜表面粗糙度，並且可改善非晶矽薄膜在加熱後引起的表面突起及傳統多晶矽薄膜造成的高角度晶界 (High angle grain boundary)問題。電性測試結果亦顯示此方法明顯比傳統多晶矽薄膜具有更低的漏電流問題。

對源/汲極，我們提出兩階段加熱的氧化介層矽化法 (Oxide-mediated silicidation)，發現此方法可形成緻密及具有平坦表面的二矽化鈷 (CoSi2) 薄膜，並且呈現均勻性奈米晶粒尺寸分佈。此製程若使用氮化鈦保護層 (TiN capping)，可形成平均 5 奈米的晶粒尺寸;若使用鈦保護層 (Ti capping) 可形成平均 4 奈米的晶核尺寸。我們並針對其形成機制作探討發現，氧化介層 (SiOx) 形成一個單向的阻絕層，只允許鈷擴散進入矽基材，但阻擋矽向外擴散。鈷和二矽化鈷同時存在於氧化介層與矽基材間，表示鈷的擴散速率高於矽化鈷的反應速率。鈦會吸收氧化介層的氧原子弱化氧化介層而加強鈷的擴散速率，因此鈦與氧化介層的反應速率須妥善控制以形成具有足夠厚度及低阻值的二矽化鈷薄膜。若反應速率過快，易形成高阻值的矽化鈷 (CoSi);若反應速率過慢，則無法形成足夠厚度的二矽化鈷薄膜。 最後在鈷薄膜的沉積過程中，發現了形狀對稱的奈米錐狀物結構，此錐狀物共具有兩種不同的型式。這種錐狀物只發生在鈷的六方最密堆積 (hcp) 結構上，並且是長在具有平行柱狀結構的鈷薄膜上。其成核機制是被應變能，濺鍍原子及離子的動能所影響;成長機制則主要是由最小表面能影響。

Abstract

As the semiconductor device was scaled down to below 90 nm, the demand of material quality and process control becomes more and more strict. The metal-oxide-semiconductor field-effect transister (MOSFET) is the most important device for ultra-large-scale integrated circuits (ULSI) such as microprocessors and semiconductor memories. The gate and source/drain electrodes are the main parts of a MOSFET, their material quality will directly influence the device performance. Hence, in this thesis, we focus on the process improvement of Gate and Source/drain electrodes of a MOSFET device.

For the polysilicon gate, we proposed a new stacked polysilicon film process combines polysilicon with amorphous silicon films and found doped stacked poly-Si films with lower surface roughness and smoother poly-Si/polyoxide interface than doped a-Si and conventional poly-Si films. This new stacked poly-Si film has the poor recrystallization- induced crystallinity as in a-Si but no protrusion on surface and no apparent high angle grain boundaries. Results of electrical breakdown voltage measurements also show that the doped poly-Si film stack has a better performance than the doped conventional poly-Si film.

For the source/drain, a oxide-mediated silicidation method with two-step annealing was developed to forms a dense and smooth with homogeneous nano-grain size distribution CoSi2 thin film. The nanocrystalline CoSi2 thin film with average grain size of 5 nm with homogeneous nano-grain size distribution can be directly formed by this method with a TiN capping layer; The average nucleus-size of about 4 nm with uniform island size distribution also can be formed by this method with a Ti-capping layer. The underline mechanism of diffusion and nucleation also be studied. Electroscopic imaging in transmission electron microscopy shows that SiOx act as a one-way diffusion barrier in oxide-mediated silicidation which only allows Co diffuse into Si substrate but inhibits Si diffuse out. X-ray photoelectron spectroscopy analysis shows that unreacted Co coexists with CoSi2 at the interface between the SiOx layer and Si substrate. Ti capping layer can absorbs oxygen from the SiOx layer, which induces weak points in the SiOx layer and then enhances Co diffusion as well as CoSi2 formation. The control of the reactions between Ti and SiOx is significant because low reaction rate cannot form enough thickness of CoSi2 film whereas high reaction rate tends to form highly resistive CoSi phase.

Finally, a very interest pyramid-like nanostructure was found during cobalt thin film deposition by a dc magnetron sputtering. The pyramid-like nanostructures were found to form on top of columnar grains only when cobalt is hcp phase. There are two types of faceted nanostructures on Si(001) substrates, where type I is composed of-1013, 2-201 and 02-21 and type II is composed of-1013, 01-11and 1-101 planes, with the basal plane of 10 0. Their nucleation is enhanced by a complex function of strain, adatom energy and ion sputtering and growth is significantly determined by the minimum surface configuration of the structure.