應用於降雨強度無線感測網路之同運行雙頻雙模射頻收發器

Abstract

射頻積體電路設計已邁入系統整合時代，在單石(Monolithic)低成本CMOS製程中完成射頻、類比與數位訊號處理電路的整合是超大型積體電路系統(System-on-a-Chip, SoC)的必然趨勢。射頻端亦屏棄以往單一頻率轉而朝向超寬頻，多模運作等。近年可程式化射頻前端(Software Defined Radio, SDR)亦開始嶄露頭角。

本論文提出並於TSMC 65nm CMOS製程中實做一個新型的5.8/10.5GHz; 5.8/24GHz雙頻、雙模無線收發機，該架構可同時傳送或接收兩個雙頻率；並能確保雙頻率功率比值不會因為瞬間壓降、製程飄移、溫度變異或本地震盪訊號不穩定，而造成改變。故能在一個恆定基準上比較通訊路徑於雙頻的損耗差，進而估計造成路徑損耗的變因（如降雨或大氣背景衰減量）。以數個收發機架構分散式網路，搭配分散式電腦斷層掃描演算法重建網格資訊，以分析此大空間尺度的路徑損耗變因。設計完成之收發機以量測降雨為目標，解決山區無法使用降雨雷達之難題。為了克服射頻超大型系統過程中所遇到的難題，如元件模型不準和過度費時的全系統模擬等，設計流程的改善和元件建模於本論文中亦有探討。單石CMOS射頻收發機中最具挑戰性的關鍵功能區塊---功率放大器(Power Amplifier, PA)有獨立章節探討特別是高階被動輸出網路的設計

Radio frequency integrated circuits design is entering a mixed signal, holistic system integration era. It is an assured trend that RF front-ends are integrated in low-cost CMOS process with low frequency high throughput analog-to-digital interfaces as well as mighty digital signal processing blocks in state-of-the-art SoC chips. For RF front-ends, narrow-band systems are being replaced by ultra wide-band or multi-band systems. In addition, multi-mode, programmable RF circuits are gaining its ground in the promising ``SDR" (software defined radio) systems.

In this thesis, a new 5.8/10.5GHz; 5.8/24GHz dual-band, dual-mode radio frequency transceiver architecture is proposed, analyzed and implemented in TSMC 65 nm CMOS process under 1mmx1mm die area. The system is capable of monitoring dual-band path loss ratio when two or more transceivers are operating. Its self-calibrating feature immunizes the system from process, voltage, and temperature variation. Thus the path loss can be monitored under a constant and reliable reference. This specific feature enables distributed computerized tomography, which assists meteorologists to reconstruct grids of real-time rain fall strengths in mountain areas and resolves the weakness of meteorological radars. To overcome the obstacles in radio-frequency VLSI implementation, design methodologies, such as custom RF passive device modeling, EM co-simulation, and behavioral modeling are refined to suit the latest trend of highly integrated mixed signal integrated circuits.

The most challenging functional block in monolithic CMOS transceiver -- Power Amplifiers, are discussed in its own chapter with emphasis on a newly proposed passive network synthesis technique.