完整後設資料紀錄
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dc.contributor.author陳奕全en_US
dc.contributor.authorChen, Yi-Chuanen_US
dc.contributor.author荊鳳德en_US
dc.contributor.authorIEEE Fellowen_US
dc.contributor.authorOptical Society of America (OSA) Fellowen_US
dc.contributor.authorChin, Alberten_US
dc.date.accessioned2014-12-12T02:34:43Z-
dc.date.available2014-12-12T02:34:43Z-
dc.date.issued2012en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT070058003en_US
dc.identifier.urihttp://hdl.handle.net/11536/72381-
dc.description.abstract近年來隨著顯示器產業的迅速發展,對於做為畫素開關元件以及電流驅動元 件的薄膜電晶體之要求也隨之增加。然而,以傳統的非晶矽薄膜電晶體而言其主動通道層由於物理性的缺陷會面臨許多困難。最近,新的透明氧化物半導體薄膜相較於傳統的非晶矽薄膜電晶體,擁有如流動性高,成本低,優良的均勻性,和良好的透光度等優點而備受關注。特別是銦鎵鋅氧化物(IGZO) 薄膜電晶體,具有優越的穩定性和性能是最有希望的候,故被廣泛研究中。 為了滿足低功率損耗應用的要求,並提高薄膜電晶體的性能,低工作電壓、低閾值電壓(VT)和小次臨界擺幅(S.S.)是必要的。為了解決這些問題,將引進高介電常數介質材料技術,已提供了另一種替代的解決方案,以實現這些目標。 在本文中,我們具有氧化鋁鑭與二氧化矽雙層閘極介電層的非晶態氧化銦鎵鋅薄膜電晶體,由於與SiO2相比更高的κ值的LaAlO3介質層加入,以至於閘極電容密度的增加,從而降低的Vt和閘極漏電流。我們的非晶態氧化銦鎵鋅薄膜電晶體顯示一個小S.S. 95 mV/dec、0.5 V的低VT、3.08cm2/Vs 的可接受場效載子遷移率以及低至1.7 V的操作電壓,結果說明,在未來具有氧化鋁鑭與二氧化矽雙層閘極介電層低操作電壓的非晶態氧化銦鎵鋅薄膜電晶體有很希望運用於高速和低功耗元件上。zh_TW
dc.description.abstractWith the rapid development of active-matrix flat panel displays (AMFPDs), thin film transistor (TFT) technologies have been widely used for display applications. However, the traditional Si TFTs using amorphous silicon and poly-crystalline silicon as active channel layer face difficulties due to physical drawback properties. Recently, the new TFTs with transparent oxide semiconductors have attracted much attention as potential candidates, due to their unique optical and electrical advantages as compared to conventional Si TFTs, such as high mobility, low cost, excellent uniformity, and good transparency to visible light. Particularly, indium gallium zinc oxide (IGZO) TFT with superior stability and performance is one of the most promising candidates and has been widely studied. To meet the requirements of low power applications and improve the TFT device performances, low operation voltage with low threshold voltage (Vt) and small subthreshold swing (SS) are needed. To address these concerns, incorporating high-κ gate dielectric into TFT provides an alternative solution to achieve these goals. In this paper, we report a low operation voltage IGZO TFT by introducing LaAlO3/SiO2 stack as gate dielectrics. Due to the higher κ-value of LaAlO3 dielectric as compared to that of SiO2, the gate capacitance density increases, which lowers the Vt and improves the gate leakage current. The LaAlO3/SiO2 TFTs showed a small SS of 95 mV/dec, a low Vt of 0.5 V, and an acceptable field effect mobility (μFE) of 3.08 cm2/V∙sec at the operation voltage as low as 1.7 V. The present results demonstrate that IGZO TFTs with LaAlO3/SiO2 as gate dielectrics has great promise in future high speed and low power applications.en_US
dc.language.isoen_USen_US
dc.subject低操作電壓zh_TW
dc.subject非晶態氧化銦鎵鋅zh_TW
dc.subject薄膜電晶體zh_TW
dc.subjectLow-Operating-Voltageen_US
dc.subjectInGaZnOen_US
dc.subjectThin Film Transistorsen_US
dc.title具有氧化鋁鑭與二氧化矽雙層閘極介電層低操作電壓 非晶態氧化銦鎵鋅薄膜電晶體之研究zh_TW
dc.titleLow-Operating-Voltage InGaZnO Thin Film Transistors with LaAlO3/SiO2 Gate Dielectricsen_US
dc.typeThesisen_US
dc.contributor.department光電系統研究所zh_TW
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