微調電路佈局以適合聚焦離子束技術

Abstract

這篇論文提出將針對以完成繞線的電路，以盡量在不影響原本電路設計的情況下，對繞線進行簡單操作，以提高聚焦離子束完成電路修補的比例，並確保最後最大延遲時間不會增加。 首先探討聚焦離子束在電路中的所受到的限制，定義出各個在調整成能執行聚焦離子束的電路修補時所造成的代價，根據這個代價去設計架構- ReFL(Repair Friendly Layout Generation for FIB Technology)，以提升電路修補的效能，最後去比較不同作法所提升的比例，並且分析結果，討論未來可做的方式。

This thesis proposes a methodology for the layout, which is completed routing and placement. There are some simple operations of adjustment for the metals without effecting the circuit seriously. These operations could make the rate of FIB repair rise, and keep the critical path delay. First, there are introduction of limitation of FIB. Then, we define the cost which spend for adjustment of FIB repairable cell. According the cost, we design a framework for rising the rate of FIB repairable cell called "ReFL"(Repair Friendly Layout Generation for FIB Technology). Finally, it compares other methods and ours by experimental result, and discuss the future work.