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dc.contributor.authorLo, Tien-Yuen_US
dc.contributor.authorHung, Chung-Chihen_US
dc.date.accessioned2014-12-08T15:09:36Z-
dc.date.available2014-12-08T15:09:36Z-
dc.date.issued2007en_US
dc.identifier.isbn978-1-4244-0920-4en_US
dc.identifier.issn0271-4302en_US
dc.identifier.urihttp://hdl.handle.net/11536/7346-
dc.identifier.urihttp://dx.doi.org/10.1109/ISCAS.2007.378787en_US
dc.description.abstractThis paper presents a high linearity MOSFET-only transconductor based on differential structures. The linearity is improved by mobility compensation techniques as the device size is scaled down in the nano-scale CMOS technology. Transconductance tuning could be achieved by transistors operating in the linear region. The simulated total harmonic distortion (THD) under 1-V power supply voltage shows 12 dB improvement of the proposed version, and -65 dB TTID can be achieved for a 1 MHz 700 mV(pp) differential input. Monte-Carlo simulation over the corner variation and transistor mismatch guarantees the shown performance. The static power consumption is 130 mu W. Simulation results demonstrate the agreement with theoretical analyses.en_US
dc.language.isoen_USen_US
dc.title1-V linear CMOS transconductor with-65 dB THD in nano-scale CMOS technologyen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/ISCAS.2007.378787en_US
dc.identifier.journal2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11en_US
dc.citation.spage3792en_US
dc.citation.epage3795en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000251608405035-
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