完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lo, Tien-Yu | en_US |
dc.contributor.author | Hung, Chung-Chih | en_US |
dc.date.accessioned | 2014-12-08T15:09:36Z | - |
dc.date.available | 2014-12-08T15:09:36Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.isbn | 978-1-4244-0920-4 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/7346 | - |
dc.identifier.uri | http://dx.doi.org/10.1109/ISCAS.2007.378787 | en_US |
dc.description.abstract | This paper presents a high linearity MOSFET-only transconductor based on differential structures. The linearity is improved by mobility compensation techniques as the device size is scaled down in the nano-scale CMOS technology. Transconductance tuning could be achieved by transistors operating in the linear region. The simulated total harmonic distortion (THD) under 1-V power supply voltage shows 12 dB improvement of the proposed version, and -65 dB TTID can be achieved for a 1 MHz 700 mV(pp) differential input. Monte-Carlo simulation over the corner variation and transistor mismatch guarantees the shown performance. The static power consumption is 130 mu W. Simulation results demonstrate the agreement with theoretical analyses. | en_US |
dc.language.iso | en_US | en_US |
dc.title | 1-V linear CMOS transconductor with-65 dB THD in nano-scale CMOS technology | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/ISCAS.2007.378787 | en_US |
dc.identifier.journal | 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 | en_US |
dc.citation.spage | 3792 | en_US |
dc.citation.epage | 3795 | en_US |
dc.contributor.department | 電信工程研究所 | zh_TW |
dc.contributor.department | Institute of Communications Engineering | en_US |
dc.identifier.wosnumber | WOS:000251608405035 | - |
顯示於類別: | 會議論文 |