以鎳為金屬墊層之覆晶錫銀銲錫接點於不同溫度下之電遷移失效模式研究

Abstract

隨著消費性電子產品小型化之趨勢，使得覆晶封裝技術也進而微小化。然而，當銲錫凸塊尺寸的微縮化相當於受到電流密度的改變，而本研究將討論Cu/Ni UBM接合之銲錫凸塊高度25um的覆晶錫銀銲錫於高電流密度下所受電遷移之影響。 過去的研究主要集中在高溫（150 ℃以上）之通電加速測試；然而，電遷移對覆晶封裝中異質金屬的影響包含多種擴散機制，而不同擴散機制受溫度影響程度之差異將導致過去高溫之加速測試無法完整呈現覆晶封裝在一般使用溫度下的可靠度。因此，「低溫」與「高電流密度」這個過去極少見的實驗條件對於覆晶封裝的影響值得深入研究。本研究探討無鉛覆晶錫銀銲錫接點於100℃的溫度下，通電電流1.35A之電遷移行為及破壞機制。 在實驗中，觀察到孔洞生成、Ni墊層消耗溶解、IMC(Ni3Sn4)累積、Cu消耗溶解，主要發生於電子流從Al導線進入bump端。且孔洞生成伴隨著電阻上升，有沿著IMC(Ni3Sn4)介面逐漸向右趨勢；同時觀察不同電阻上升狀況下銲錫接點破壞機制或失效模式，討論對應的電遷移破壞機制。另外比較降溫至80℃的溫度下，是否有相同破壞機制或失效模式之現象。結果顯示降溫後孔洞生成為主要導致阻值上升原因。

As the size of consumer electronic products continues to shrink, flip chip joints also have to shrink accordingly. In this thesis, we will study the elecromigration behavior of lead-free SnAg solder joints, which has 25μm bump height with Cu/Ni UBM(under-bump-metallization) under high current density. The accelerated electromigration tests in previous studies were usually conducted under high temperature conditions (above 150 ℃); however , the electromigration of flip chip solder joints depends on stressing temperatures. Subsequently, the accelerated electromigration tests in previous studies under high temperature could not thoroughly demonstrate the reliability of flip chip under normal usage temperatures. Therefore, low temperature and high current density are conditions which were seldom examined in the past. In this study, we investigate failure mechanism of the bump are monitored at various stages of electromigration stressed by 1.35A at 100 ℃.It is found that voids along IMC interface is mainly responsible for the increase in bump resistance. In experimental results, we observed that the electromigration failure mode in the solder specimens is the Ni dissolution, the growing of intermetallic compounds, the Cu dissolution, generation of void and the void propagating results in increase in bump resistance. Finally, to compare the failure mechanism of electromigration behavior, the solder joints were also stressed by 1.35A at 80 ℃.