Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 沈明峰 | en_US |
dc.contributor.author | Ming-Feng Shen | en_US |
dc.contributor.author | 許騰尹 | en_US |
dc.contributor.author | Terng-Yin Hsu | en_US |
dc.date.accessioned | 2014-12-12T02:40:07Z | - |
dc.date.available | 2014-12-12T02:40:07Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009217617 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/74224 | - |
dc.description.abstract | 在現代無線通訊系統中,直接序列展頻(DSSS)和正交頻率多重分割(OFDM)被廣泛的使用。無線通訊使用空氣當作介質,比有線通訊多了更多的不確定性,因此,無線通訊系統的封包裡一般都會定義preamble欄位作為接收端封包偵測及同步之用。 而本論文提出一個有效率,應用於802.11b\g 802.11a\g 自動增益控制、時間同步演算法。所提出的方法利用安置在每個封包之前的preamble,在低訊號雜訊比、載波頻率偏移、多路徑衰減及路徑損失的通道時可以快速,正確的達到前端訊號處理的完成。而時間同步演算法不同於一般的做法,可以一倍取樣的方式正常工作。 為了瞭解整個系統,我們使用Matlab建立了系統模擬平台。我們可以觀察系統中任一訊號的波形,並且可以得知通道中的非理想效應對整個系統或某些訊號有何影響。此平台更可以用來驗證我們所提出的演算法,本論文中也放了一些模擬結果圖,也驗證了演算法的成功。 | zh_TW |
dc.description.abstract | Direct Sequence Spreading Spectrum (DSSS) and Orthogonal Frequency Division Multiplexing (OFDM) are widely used in modern wireless communications systems. Unlike the wire channel, wireless communication uses radio as its medium and has more uncertainty with it. Therefore, WLAN frame format generally contains preamble field for packet diction and synchronization. In this thesis, an efficient automatic gain control (AGC), timing synchronization for DSSS based WLAN defined in IEEE 802.11b\g and 802.11b\a had been proposed. The proposed methods enables a rapid and accurate front-end signal process even under very low SNR, carrier frequency offset multi-path fading and path loss channel by using preamble at the start of every frame. Unlike the general system, the proposed timing synchronization algorithms could work correctly under one times sampling. To get familiar with IEEE standards, simulation platforms were set up with Matlab mathematical software which let us have a chance to probe signals in every place inside the system and visual view of the channel effects. And with this system, our algorithms could be verified. Some simulation results were shown in this thesis and the accomplishment of the proposed algorithms are also verified with these simulation results. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 時間同步 | zh_TW |
dc.subject | 前置碼 | zh_TW |
dc.subject | timing synchronization | en_US |
dc.subject | preamble | en_US |
dc.title | 應用於無線基頻處理器之低取樣時間同步迴路設計 | zh_TW |
dc.title | Design of Low Sampling based Timing Synchronization for Wireless Baseband Application | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 資訊科學與工程研究所 | zh_TW |
Appears in Collections: | Thesis |
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